Inventor

Michael Fitton

Inventor
London, GB

Overview

23→
Patents
2007–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 23 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing24%
H04BTransmission16%
H04LTransmission of digital information, e.g. telegraphic communication14%
H04WWireless communication networks14%
H04JMultiplex communication11%
H03KPulse technique8%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
F28DHeat-exchange apparatus, not provided for in another subclass, in which the heat-exchange media do not come into direct contact3%
F28FDetails of heat-exchange and heat-transfer apparatus, of general application3%
H01SDevices using the process of light amplification by stimulated emission of radiation [laser] to amplify or generate light3%
PatentTitleYear
10,790,830Fused memory and arithmetic circuit20209,483,233'Methods and apparatus for matrix decompositions in programmable logic devices'20169,083,139'Mounting vane for optical element of a laser'20159,000,802'Systems and methods for interfacing between hard logic and soft logic in a hybrid integrated device'20158,897,784'Processor for a base station control unit'20148,629,691'Systems and methods for interfacing between hard logic and soft logic in a hybrid integrated device'20148,555,031'Methods and apparatus for matrix decompositions in programmable logic devices'20138,548,078'Ranging code detection'20138,433,322'Processor for a base station control unit'20138,428,179'Apparatus and method for crest factor reduction'20138,359,458'Methods and apparatus for matrix decompositions in programmable logic devices'20138,307,021'Hardware architecture and scheduling for high performance solution to cholesky decomposition'20128,156,171'Digital logic circuit'20128,121,203'Ranging code detection'20127,979,673'Method and apparatus for matrix decompositions in programmable logic devices'20117,961,669'Processor for a base station control unit'20117,761,050'Communication network for indoor environment'20107,716,454'Method and apparatus for matrix decomposition in programmable logic devices'20107,386,032'Receiver processing systems'20087,346,369'Mode monitoring and identification through distributed radio'20087,342,954'Adaptive modulation for wireless networks'20087,330,505'Equaliser apparatus and methods'20087,295,597'Receiver processing systems'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2010Patents assigned to TOSHIBA KK (6)· patent assignee history
2007–2010Based in Bristol, GB· patent location history
2010–2016Patents assigned to ALTERA CORP (15)· patent assignee history
2010–2013Based in East Dulwich, GB· patent location history
2011–2014Based in London, GB· patent location history
2012–2014Patents assigned to FITTON MICHAEL (8)· patent assignee history
2012–2014Patents assigned to DHANOA KULWINDER (4)· patent assignee history
2012–2013Patents assigned to MEHTA MEHUL (2)· patent assignee history
2013–2020Based in Menlo Park, CA, US· patent location history
2015Based in Yarnton, GB· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ALTERA CORP152010–2016
FITTON MICHAELself82012–2014
TOSHIBA KK62007–2010
DHANOA KULWINDER42012–2014
MEHTA MEHUL22012–2013
Locations
LocationPatentsSpan
London, GB82011–2014
Bristol, GB62007–2010
Menlo Park, California, US52013–2020
East Dulwich, GB32010–2013
Yarnton, GB12015