Inventor

Khandker N. Quader

Inventor

Sunnyvale, CA, US

Overview

33→

Patents

1991–2012

Patent span

Physics

Primary field (CPC G)

Patents· 33 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores79%

H03KPulse technique8%

G05FSystems for regulating electric or magnetic variables5%

G06KGraphical data reading5%

G06FElectric digital data processing3%

PatentTitleYear

8,111,551'Nonvolatile semiconductor memory device having protection function for each memory block'2012 7,952,925'Nonvolatile semiconductor memory device having protection function for each memory block'2011 7,787,296'Nonvolatile semiconductor memory device having protection function for each memory block'2010 7,468,915'Method of reducing disturbs in non-volatile memory'2008 7,420,846'Read and erase verify methods and circuits suitable for low voltage non-volatile memories'2008 7,394,704'Non-volatile semiconductor memory device, electronic card using the same and electronic apparatus'2008 7,379,346'Erase inhibit in non-volatile memories'2008 7,376,010'Nonvolatile semiconductor memory device having protection function for each memory block'2008 7,224,613'Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states'2007 7,145,804'Method of reducing disturbs in non-volatile memory'2006 7,095,654'Method and system for programming and inhibiting multi-level, non-volatile memory cells'2006 7,061,798'Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states'2006 7,046,548'Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells'2006 6,990,018'Non-volatile semiconductor memory device, electronic card using the same and electronic apparatus'2006 6,977,844'Method of reducing disturbs in non-volatile memory'2005 6,967,872'Method and system for programming and inhibiting multi-level, non-volatile memory cells'2005 6,958,936'Erase inhibit in non-volatile memories'2005 6,944,068'Method and system for programming and inhibiting multi-level, non-volatile memory cells'2005 6,888,752'Method of reducing disturbs in non-volatile memory'2005 6,870,768'Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells'2005 6,839,281'Read and erase verify methods and circuits suitable for low voltage non-volatile memories'2005 6,807,095'Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements'2004 6,781,877'Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells'2004 6,717,851'Method of reducing disturbs in non-volatile memory'2004 6,696,880'High voltage switch suitable for non-volatile memories'2004 6,522,580'Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states'2003 6,396,757'Multiple output current mirror with improved accuracy'2002 6,285,615'Multiple output current mirror with improved accuracy'2001 6,282,130'EEPROM memory chip with multiple use pinouts'2001 5,994,937'Temperature and power supply adjusted address transition detector'1999 5,243,700'Port expander architecture for mapping a first set of addresses to external memory and mapping a second set of addresses to an I/O port'1993 5,077,738'Test mode enable scheme for memory'1991 5,057,715'CMOS output circuit using a low threshold device'1991

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1991Patents assigned to INTEL CORP (2)· patent assignee history

1991–1993Based in Citrus Heights, CA, US· patent location history

1993–2012Patents assigned to QUADER KHANDKER N (2)· patent assignee history

1999–2012Patents assigned to TOSHIBA KK (9)· patent assignee history

1999Patents assigned to IBM (1)· patent assignee history

1999–2012Based in Sunnyvale, CA, US· patent location history

2001–2012Patents assigned to SANDISK CORP (26)· patent assignee history

2006–2008Based in Santa Clara, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
SANDISK CORP	26	2001–2012
TOSHIBA KK	9	1999–2012
INTEL CORP	2	1991
QUADER KHANDKER Nself	2	1993–2012
IBM	1	1999

Locations

Location	Patents	Span
Sunnyvale, California, US	28	1999–2012
Citrus Heights, California, US	3	1991–1993
Santa Clara, California, US	2	2006–2008