Inventor
Eric E. Vogt
Inventor
Minneapolis, MN, US
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes14%
H10DInorganic electric semiconductor devices14%
H01LSemiconductor devices8%
H04LTransmission of digital information, e.g. telegraphic communication8%
G06FElectric digital data processing6%
G08BSignalling systems, e.g. personal calling systems6%
H04MTelephonic communication6%
H04WWireless communication networks6%
B82YSpecific uses or applications of nanostructures3%
PatentTitleYear
9,997,466Integrated circuit stack including a patterned array of electrically conductive pillars20189,875,626Methods and systems for determining a location of a container by tracking a SIM card associated with the container20189,548,277'Integrated circuit stack including a patterned array of electrically conductive pillars'20179,368,007'Methods and systems for determining a location of a container'20168,901,702'Programmable electrical fuse with temperature gradient between anode and cathode'20148,248,254'Methods and systems for certifying provenance of alcoholic beverages'20128,022,832'Methods and systems for certifying provenance of alcoholic beverages'20117,882,452'Modeling silicon-on-insulator stress effects'20117,732,287'Method of forming a body-tie'20107,322,015'Simulating a dose rate event in a circuit design'20087,238,541'Method of incorporating magnetic materials in a semiconductor manufacturing process'20077,169,679'Varactor with improved tuning range'20077,159,178'System for supporting a virtual community'20076,939,758'Gate length control for semiconductor chip design'20056,903,429'Magnetic sensor integrated with CMOS'20056,674,108'Gate length control for semiconductor chip design'20046,465,324'Recessed silicon oxidation for devices such as a CMOS SOI ICs'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2018Patents assigned to HONEYWELL INT INC (12)· patent assignee history
2002–2008Based in Minneapolis, MN, US· patent location history
2007Patents assigned to COMMUNISPACE CORP (1)· patent assignee history
2007–2018Based in Belmont, MA, US· patent location history
2007–2011Based in Maple Grove, MN, US· patent location history
2011–2018Patents assigned to EPROVENANCE LLC (4)· patent assignee history
2012Patents assigned to CHURCHILL RUTH (1)· patent assignee history
2012Patents assigned to VOGT ERIC (1)· patent assignee history
2014–2018Based in Independence, MN, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HONEYWELL INT INC | 12 | 2002–2018 |
| EPROVENANCE LLC | 4 | 2011–2018 |
| CHURCHILL RUTH | 1 | 2012 |
| COMMUNISPACE CORP | 1 | 2007 |
| VOGT ERICself | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Minneapolis, Minnesota, US | 6 | 2002–2008 |
| Belmont, Massachusetts, US | 5 | 2007–2018 |
| Independence, Minnesota, US | 3 | 2014–2018 |
| Maple Grove, Minnesota, US | 3 | 2007–2011 |