Inventor
Soo-Jin Hong
Inventor
Seoul, KR
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1037%
H10DInorganic electric semiconductor devices22%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H10BElectronic memory devices12%
H01LSemiconductor devices8%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
C23CCoating metallic material2%
G11CStatic stores2%
PatentTitleYear
9,484,203'Methods of manufacturing semiconductor devices'20169,449,973'Semiconductor device'20169,230,922'Precursor composition for deposition of silicon dioxide film and method for fabricating semiconductor device using the same'20168,877,634'Methods of forming a fine pattern on a substrate and methods of forming a semiconductor device having a fine pattern'20148,692,372'Semiconductor device having impurity doped polycrystalline layer including impurity diffusion prevention layer and dynamic random memory device including the semiconductor device'20148,319,260'Semiconductor devices having polysilicon gate layer patterns and methods of manufacturing the same'20128,183,136'Method of forming insulating layer and method of manufacturing transistor using the same'20127,871,897'Method of forming shallow trench isolation regions in devices with NMOS and PMOS regions'20117,807,543'Methods of manufacturing trench isolation structures using selective plasma ion immersion implantation and deposition (PIIID)'20107,785,985'Methods of manufacturing semiconductor devices'20107,514,744'Semiconductor device including carrier accumulation layers'20097,351,661'Semiconductor device having trench isolation layer and a method of forming the same'20087,160,787'Structure of trench isolation and a method of forming the same'20076,756,654'Structure of trench isolation and a method of forming the same'20046,740,955'Trench device isolation structure'20046,699,799'Method of forming a semiconductor device'20046,683,354'Semiconductor device having trench isolation layer and a method of forming the same'20046,624,041'Method for forming trench type isolation film using annealing'20036,593,207'Method of forming a trench device isolation structure with upper liner pattern'20036,583,025'Method of forming a trench isolation structure comprising annealing the oxidation barrier layer thereof in a furnace'20036,566,229'Method of forming an insulating layer in a trench isolation type semiconductor device'20036,251,746'Methods of forming trench isolation regions having stress-reducing nitride layers therein'20016,121,110'Trench isolation method for semiconductor device'20005,677,232'Methods of fabricating combined field oxide/trench isolation regions'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2016Patents assigned to SAMSUNG ELECTRONICS CO LTD (24)· patent assignee history
1997–2008Based in Seoul, KR· patent location history
2009–2011Based in Gyeonggi-do, KR· patent location history
2012–2014Patents assigned to HONG SOO-JIN (3)· patent assignee history
2012–2014Patents assigned to LEE DEOK-HYUNG (3)· patent assignee history
2012Patents assigned to JEONG SEONG-HOON (2)· patent assignee history
2012Patents assigned to KIM DONG-CHAN (1)· patent assignee history
2012–2016Based in Guri-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 24 | 1997–2016 |
| HONG SOO-JINself | 3 | 2012–2014 |
| LEE DEOK-HYUNG | 3 | 2012–2014 |
| JEONG SEONG-HOON | 2 | 2012 |
| KIM DONG-CHAN | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Seoul, KR | 13 | 1997–2008 |
| Guri-si, KR | 7 | 2012–2016 |
| Gyeonggi-do, KR | 4 | 2009–2011 |