LexDanaLexDanabeta
Inventor

Zhihong Zhang

Inventor
Chandler, AZ, US

Overview

57→
Patents
1995–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 57 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices20%
H10DInorganic electric semiconductor devices18%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
G11BInformation storage based on relative movement between record carrier and transducer8%
G01RMeasuring electric variables4%
Y10TTechnical subjects covered by former us classification4%
G06FElectric digital data processing4%
H10NElectric solid-state devices not otherwise provided for3%
H04LTransmission of digital information, e.g. telegraphic communication2%
PatentTitleYear
10,931,755Method and apparatus for managing a shared storage system202110,844,428Error suppression in sequenced DNA fragments using redundant reads with unique molecular indices (UMIS)202010,378,010Methods and systems for construction of normalized nucleic acid libraries201910,217,860Partially biased isolation in semiconductor devices201910,186,612Partially biased isolation in semiconductor devices201910,074,387Method and system for providing a read transducer having symmetric antiferromagnetically coupled shields201810,068,601Free layer only magnetic reader that may have a reduced shield-to-shield spacing and a multilayer side bias20189,830,936Magnetic read head with antiferromagentic layer20179,825,169'Partial, self-biased isolation in semiconductor devices'20179,728,600'Partially biased isolation in semiconductor devices'20179,715,889'Read sensor having an insulating layer capable of use in two-dimensional magnetic recording'20179,691,880'Semiconductor device with enhanced 3D resurf'20179,680,011'Self-adjusted isolation bias in semiconductor devices'20179,666,671'Semiconductor device with composite drift region and related fabrication method'20179,640,635'Reliability in mergeable semiconductor devices'20179,614,041'Multi-gate semiconductor devices with improved hot-carrier injection immunity'20179,601,564'Deep trench isolation'20179,590,097'Semiconductor devices and related fabrication methods'20179,543,379'Semiconductor device with peripheral breakdown protection'20179,490,322'Semiconductor device with enhanced 3D resurf'20169,466,712'Resurf semiconductor device charge balancing'20169,412,400'Tunnel magnetoresistance read head with narrow shield-to-shield spacing'20169,406,331'Method for making ultra-narrow read sensor and read transducer device resulting therefrom'20169,385,229'Semiconductor device with improved breakdown voltage'20169,371,364'Dual-targeted therapeutic peptide for nasopharyngeal carcinoma, nanoparticles carrying same and uses thereof'20169,343,526'Deep trench isolation'20169,331,991'Authenticating a client using linked authentication credentials'20169,331,025'Die edge sealing structures and related fabrication methods'20169,306,060'Semiconductor devices and related fabrication methods'20169,214,172'Method of manufacturing a magnetic read head'20159,165,918'Composite semiconductor device with multiple threshold voltages'20159,136,222'Chip identification pattern and method of forming'20159,136,323'Drain-end drift diminution in semiconductor devices'20159,117,841'Mergeable semiconductor device with improved reliability'20159,070,576'Semiconductor device and related fabrication methods'20159,065,043'Tunnel magnetoresistance read head with narrow shield-to-shield spacing'20159,041,103'RESURF semiconductor device charge balancing'20159,010,954'Glo-blades skates'20158,896,102'Die edge sealing structures and related fabrication methods'20148,890,557'Built-in self-test method and structure'20148,883,017'Method and system for providing a read transducer having seamless interfaces'20148,853,780'Semiconductor device with drain-end drift diminution'20148,847,312'LDMOS device and method for improved SOA'20148,711,528'Tunnel magnetoresistance read head with narrow shield-to-shield spacing'20148,674,641'System and method for regulating motor rotation speed'20148,671,442'Modifying a user account during an authentication process'20148,607,438'Method for fabricating a read sensor for a read transducer'20138,491,802'Method of forming a dielectric slope for EAMR and magnetic writer'20138,487,398'Capacitor device using an isolated well and method therefor'20138,389,366'Resurf semiconductor device charge balancing'20138,120,402'PWM control circuit having adjustable minimum duty cycle'20127,996,881'Modifying a user account during an authentication process'20117,961,022'Pulsed width modulated control method and apparatus'20117,603,700'Authenticating a client using linked authentication credentials'20097,163,721'Method to plasma deposit on organic polymer dielectric film'20076,919,101'Method to deposit an impermeable film on porous low-k dielectric film'20055,454,630'Automotive antilock braking'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2018Based in Fremont, CA, US· patent location history
2009–2016Based in Great Falls, VA, US· patent location history
2011–2014Based in Shanghai, CN· patent location history
2012–2017Patents assigned to ZHANG ZHIHONG (25)· patent assignee history
2013–2017Patents assigned to FREESCALE SEMICONDUCTOR INC (23)· patent assignee history
2013–2017Patents assigned to ZUO JIANG-KAI (16)· patent assignee history
2013–2016Based in Tempe, AZ, US· patent location history
2014–2017Patents assigned to YANG HONGNING (13)· patent assignee history
2014–2019Based in Chandler, AZ, US· patent location history
2017–2019Patents assigned to NXP USA INC (11)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ZHANG ZHIHONGself252012–2017
FREESCALE SEMICONDUCTOR INC232013–2017
ZUO JIANG-KAI162013–2017
YANG HONGNING132014–2017
NXP USA INC112017–2019
Locations
LocationPatentsSpan
Chandler, AZ, US252014–2019
Fremont, California, US142005–2018
Great Falls, Virginia, US42009–2016
Tempe, AZ, US32013–2016
Shanghai, CN32011–2014