Inventor
David Pritchard
Inventor
Glenville, NY, US
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices27%
H01LSemiconductor devices23%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1021%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
H10BElectronic memory devices4%
G06FElectric digital data processing3%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation3%
G01RMeasuring electric variables1%
G11CStatic stores1%
PatentTitleYear
11,094,791Vertical transistor device with source/drain regions comprising a twi-dimensional (2D) material and methods of making such vertical transistor devices202110,727,108Dummy gate isolation and method of production thereof202010,691,862Layouts for connecting contacts with metal tabs or vias202010,651,136Technique for decoupling plasma antennae from actual circuitry202010,529,704Auxiliary gate antenna diodes202010,497,576Devices with slotted active regions201910,347,543FDSOI semiconductor device with contact enhancement layer and method of manufacturing201910,262,941Devices and methods for forming cross coupled contacts201910,186,524Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions201910,181,522Simplified gate to source/drain region connections201910,068,806Method, apparatus, and system for using a cover mask for enabling metal line jumping over MOL features in a standard cell20189,947,590Method, apparatus, and system for using a cover mask for enabling metal line jumping over MOL features in a standard cell20189,941,301Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions20189,666,488'Pass-through contact using silicide'20179,472,455'Methods of cross-coupling line segments on a wafer'20169,465,907'Multi-polygon constraint decomposition techniques for use in double patterning applications'20169,436,081'Methods of modifying masking reticles to remove forbidden pitch regions thereof'20169,224,617'Forming cross-coupled line segments'20158,021,933'Integrated circuit including structures arranged at different densities and method of forming the same'20118,018,070'Semiconductor device, method for manufacturing semiconductor devices and mask systems used in the manufacturing of semiconductor devices'20117,955,919'Spacer-less transistor integration scheme for high-K gate dielectrics and small gate-to-gate spaces applicable to Si, SiGe and strained silicon schemes'20117,678,654'Buried bitline with reduced resistance'20107,582,566'Method for redirecting void diffusion away from vias in an integrated circuit design'20097,436,040'Method and apparatus for diverting void diffusion in integrated circuit conductors'20087,361,965'Method and apparatus for redirecting void diffusion away from vias in an integrated circuit design'20087,259,083'Local interconnect manufacturing process'20076,562,700'Process for removal of resist mask over low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and removal of residues from via etch and resist mask removal'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2009Patents assigned to LSI LOGIC CORP (3)· patent assignee history
2003–2011Based in Portland, OR, US· patent location history
2007–2011Patents assigned to LSI CORP (3)· patent assignee history
2008–2009Based in Saxony, DE· patent location history
2010–2011Patents assigned to QIMONDA AG (3)· patent assignee history
2010–2011Based in Dresden, DE· patent location history
2015–2020Patents assigned to GLOBALFOUNDRIES INC (17)· patent assignee history
2015–2021Based in Glenville, NY, US· patent location history
2018Based in Beacon, NY, US· patent location history
2021Patents assigned to GLOBALFOUNDRIES US INC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 17 | 2015–2020 |
| LSI CORP | 3 | 2007–2011 |
| LSI LOGIC CORP | 3 | 2003–2009 |
| QIMONDA AG | 3 | 2010–2011 |
| GLOBALFOUNDRIES US INC | 1 | 2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Glenville, New York, US | 16 | 2015–2021 |
| Dresden, DE | 3 | 2010–2011 |
| Portland, OR, US | 3 | 2003–2011 |
| Saxony, DE | 3 | 2008–2009 |
| Beacon, New York, US | 2 | 2018 |