Inventor
Peter Lee
Inventor
Musashino, JP
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing28%
H03KPulse technique22%
H04LTransmission of digital information, e.g. telegraphic communication17%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use17%
B82YSpecific uses or applications of nanostructures6%
H10DInorganic electric semiconductor devices6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
PatentTitleYear
7,721,234'Simulation method and simulation program'20107,123,049'Output buffer circuit with control circuit for modifying supply voltage and transistor size'20066,952,112'Output buffer circuit with control circuit for modifying supply voltage and transistor size'20056,937,059'Output buffer circuit with control circuit for modifying supply voltage and transistor size'20056,634,015'Computer-readable storage media stored with a delay library for designing a semiconductor integrated circuit device'20035,742,071'Wiringless logical operation circuits'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2003Patents assigned to HITACHI LTD (2)· patent assignee history
1998Based in Kokubunji, JP· patent location history
2003–2006Based in Musashino, JP· patent location history
2005–2010Patents assigned to RENESAS TECH CORP (4)· patent assignee history
2010Based in Tokyo, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| RENESAS TECH CORP | 4 | 2005–2010 |
| HITACHI LTD | 2 | 1998–2003 |
Locations
| Location | Patents | Span |
|---|---|---|
| Musashino, JP | 4 | 2003–2006 |
| Tokyo, JP | 1 | 2010 |
| Kokubunji, JP | 1 | 1998 |