Inventor
Mark D. Hummel
Inventor
Franklin, MA, US
Overview
Patents· 79 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing61%
H04LTransmission of digital information, e.g. telegraphic communication23%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
H03MCoding4%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications3%
G09GArrangements or circuits for control of indicating devices using static means to present variable information2%
G11CStatic stores1%
H03KPulse technique1%
H04QSelecting1%
H04WWireless communication networks1%
PatentTitleYear
11,119,944Memory pools in a memory model for a unified computing system202111,082,347Techniques for reducing congestion in a computer network202111,038,800Techniques for reducing the overhead of providing responses in a computing network202110,789,194Techniques for efficiently synchronizing data transmissions on a network202010,769,076Distributed address translation in a multi-node interconnect fabric202010,324,860Memory heaps in a memory model for a unified computing system201910,248,315Devices and methods for interconnecting server nodes201910,200,154System and method for early packet header verification201910,097,203Lane-striped computation of packet CRC to maintain burst error properties20189,965,392Managing coherent memory between an accelerated processing device and a central processing unit20189,954,984System and method for enabling replay using a packetized link protocol20189,858,221'Producer/consumer remote synchronization'20189,720,768'System and method for early packet header verification'20179,606,936'Generalized control registers'20179,535,849'IOMMU using two-level address translation for I/O and computation offload devices on a peripheral interconnect'20179,448,930'Memory heaps in a memory model for a unified computing system'20169,430,391'Managing coherent memory between an accelerated processing device and a central processing unit'20169,424,199'Virtual input/output memory management unit within a guest virtual machine'20169,253,287'Speculation based approach for reliable message communications'20169,251,001'Channel rotating error correction code'20169,176,794'Graphics compute process scheduling'20159,176,795'Graphics processing dispatch from user mode'20159,152,571'All invalidate approach for memory management units'20159,154,451'Systems and methods for sharing devices in a virtualization environment'20159,137,173'Devices and methods for interconnecting server nodes'20159,116,809'Memory heaps in a memory model for a unified computing system'20159,069,698'Channel rotating error correction code'20159,009,419'Shared memory space in a unified memory model'20158,984,511'Visibility ordering in a memory model for a unified computing system'20158,966,461'Vector width-aware synchronization-elision for vector processors'20158,935,475'Cache management for memory operations'20158,933,947'Reading a local memory of a processing unit'20158,929,220'Processing system using virtual network interface controller addressing as flow control metadata'20158,879,301'Method and apparatus for controlling state information retention in an apparatus'20148,875,256'Data flow processing in a network environment'20148,868,672'Server node interconnect devices and methods'20148,842,126'Methods and systems to facilitate operation in unpinned memory'20148,832,382'Sub page and page memory management apparatus and method'20148,825,927'Systems and methods for managing queues'20148,806,025'Systems and methods for input/output virtualization'20148,719,464'Efficient memory and resource management'20148,706,941'Interrupt virtualization'20148,661,177'Method and apparatus for controlling system interrupts'20148,635,385'Mechanism to handle peripheral page faults'20148,615,637'Systems and methods for processing memory requests in a multi-processor system using a probe engine'20138,489,789'Interrupt virtualization'20138,386,745'I/O memory management unit including multilevel address translation for I/O and computation offload'20138,244,978'IOMMU architected TLB support'20128,180,944'Guest interrupt manager that records interrupts for guests and delivers interrupts to executing guests'20128,001,409'Synchronization device and methods thereof'20117,917,726'Using an IOMMU to create memory archetypes'20117,882,330'Virtualizing an IOMMU'20117,873,770'Filtering and remapping interrupts'20117,849,287'Efficiently controlling special memory mapped system accesses'20107,809,923'Direct memory access (DMA) address translation in an input/output memory management unit (IOMMU)'20107,793,067'Translation data prefetch in an IOMMU'20107,673,116'Input/output memory management unit that implements memory attributes based on translation data'20107,653,803'Address translation for input/output (I/O) devices and interrupt remapping for I/O devices in an I/O memory management unit (IOMMU)'20107,640,315'Implementing locks in a distributed processing system'20097,613,898'Virtualizing an IOMMU'20097,596,742'Error detection in a communication link'20097,548,999'Chained hybrid input/output memory management unit'20097,543,131'Controlling an I/O MMU'20097,516,247'Avoiding silent data corruption and data leakage in a virtual environment with multiple guests'20097,480,784'Ensuring deadlock free operation for peer to peer traffic in an input/output memory management unit (IOMMU)'20097,421,525'System including a host connected to a plurality of memory modules via a serial memory interconnect'20087,287,105'Asynchronous-mode sync FIFO having automatic lookahead and deterministic tester operation'20077,069,361'System and method of maintaining coherency in a distributed communication system'20066,950,438'System and method for implementing a separate virtual channel for posted requests in a multiprocessor computer system'20056,760,838'System and method of initializing and determining a bootstrap processor BSP in a fabric of a distributed multiprocessor computing system'20046,751,684'System and method of allocating bandwidth to a plurality of devices interconnected by a plurality of point-to-point communication links'20046,745,272'System and method of increasing bandwidth for issuing ordered transactions into a distributed communication system'20046,738,917'Low latency synchronization of asynchronous data'20046,721,813'Computer system implementing a system and method for tracking the progress of posted write transactions'20046,665,742'SYSTEM FOR RECONFIGURING A FIRST DEVICE AND/OR A SECOND DEVICE TO USE A MAXIMUM COMPATIBLE COMMUNICATION PARAMETERS BASED ON TRANSMITTING A COMMUNICATION TO THE FIRST AND SECOND DEVICES OF A POINT-TO-POINT LINK'20036,448,815'Low voltage differential receiver/transmitter and calibration method thereof'20025,016,162'Contention revolution in a digital computer system'19914,771,377'Microcode control apparatus'19884,569,018'Digital data processing system having dual-purpose scratchpad and address translation memory'1986Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1986–2021Based in Franklin, MA, US· patent location history
1988–1991Based in Bellingham, MA, US· patent location history
2003–2021Patents assigned to ADVANCED MICRO DEVICES INC (54)· patent assignee history
2012–2017Patents assigned to HUMMEL MARK (19)· patent assignee history
2012–2019Patents assigned to HUMMEL MARK D (14)· patent assignee history
2014–2021Patents assigned to ATI TECHNOLOGIES ULC (15)· patent assignee history
2014–2019Patents assigned to MAYHEW DAVID E (10)· patent assignee history
2017–2021Based in Santa Clara, CA, US· patent location history
2018Based in Westford, MA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ADVANCED MICRO DEVICES INC | 54 | 2003–2021 |
| HUMMEL MARKself | 19 | 2012–2017 |
| ATI TECHNOLOGIES ULC | 15 | 2014–2021 |
| HUMMEL MARK Dself | 14 | 2012–2019 |
| MAYHEW DAVID E | 10 | 2014–2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Franklin, Massachusetts, US | 70 | 1986–2021 |
| Santa Clara, California, US | 6 | 2017–2021 |
| Bellingham, Massachusetts, US | 2 | 1988–1991 |
| Westford, Massachusetts, US | 1 | 2018 |