Inventor
YING-CHENG CHUANG
Inventor
TW
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices29%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%
H10BElectronic memory devices16%
H10DInorganic electric semiconductor devices9%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices2%
PatentTitleYear
12,581,670Semiconductor device with programmable insulating layer and method for fabricating the same202612,568,613Method of manufacturing semiconductor device202612,543,302Memory device having planarized fins and method of manufacturing the same202612,538,787Method of manufacturing semiconductor structure including nitrogen treatment202612,525,475Method of manufacturing semiconductor device using underlayer for reducing defect in array region202612,482,657Method of manufacturing semiconductor structure using multi-layer hard mask202512,482,748Method of manufacturing semiconductor structure including nitrogen treatment and semiconductor structure thereof202512,463,090Method of manufacturing semiconductor structure including a planarization and semiconductor structure thereof202512,396,151Method of manufacturing semiconductor device202512,211,696Method of manufacturing semiconductor structure with improved etching process202512,193,211Method of manufacturing semiconductor device with word lines202512,185,555Semiconductor memory device manufacturing method202412,183,584Method of manufacturing semiconductor structure with improved etching process202412,178,037Method of manufacturing semiconductor device with word lines202412,154,821Method of manufacturing semiconductor device including isolation structure with nitridation layer202412,094,724Method of preparing active areas202411,830,744Method of preparing active areas202311,557,549Method of manufacturing semiconductor structure having dummy pattern around array area202311,502,041Method of forming a pattern202211,450,553Semiconductor structure and method of forming the same202211,444,180Method of forming uniform fin features202211,315,887Semiconductor structure having dummy pattern around array area and method of manufacturing the same202211,289,366Method of manufacturing semiconductor structure2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2026Patents assigned to NANYA TECHNOLOGY CORP (23)· patent assignee history
2022–2026Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NANYA TECHNOLOGY CORP | 23 | 2022–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 23 | 2022–2026 |