Inventor
Bartlet H. DeProspo
Inventor
Goshen, NY, US
Overview
Patents· 30 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices25%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
G06KGraphical data reading8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
G06FElectric digital data processing5%
G06VImage or video recognition or understanding5%
B23KSoldering or unsoldering4%
B42DBooks4%
C23CCoating metallic material4%
G07CTime or attendance registers4%
PatentTitleYear
11,056,429Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device202110,912,986Dynamic rigidity mechanism202110,784,156Self-aligned airgaps with conductive lines and vias202010,770,348Location-specific laser annealing to improve interconnect microstructure202010,752,039Structure of implementing a directed self-assembled security pattern202010,629,529Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device202010,559,498Location-specific laser annealing to improve interconnect microstructure202010,515,894Enhanced self-alignment of vias for a semiconductor device201910,366,952Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device201910,366,920Location-specific laser annealing to improve interconnect microstructure201910,315,451Structure, system, method, and recording medium of implementing a directed self-assembled security pattern201910,229,967High-density MIM capacitors201910,211,151Enhanced self-alignment of vias for asemiconductor device201910,150,323Structure, system, method, and recording medium of implementing a directed self-assembled security pattern201810,109,579Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device201810,099,108Dynamic rigidity mechanism201810,083,905Skip-vias bypassing a metallization level at minimum pitch20189,997,451Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device20189,911,651'Skip-vias bypassing a metallization level at minimum pitch'20189,899,338'Structure and fabrication method for enhanced mechanical strength crack stop'20189,899,256'Self-aligned airgaps with conductive lines and vias'20189,881,431'Security key system'20189,837,305Forming deep airgaps without flop over20179,837,485High-density MIM capacitors20179,824,982'Structure and fabrication method for enhanced mechanical strength crack stop'20179,793,206'Heterogeneous metallization using solid diffusion removal of metal interconnects'20179,778,007'Matching a spent firearm cartridge'20179,760,817'Security key system'20179,685,366'Forming chamferless vias using thermally decomposable porefiller'20179,418,327'Security key system'2016Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2016–2021Patents assigned to IBM (28)· patent assignee history
2016–2021Based in Goshen, NY, US· patent location history
2020–2021Patents assigned to TESSERA INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 28 | 2016–2021 |
| TESSERA INC | 2 | 2020–2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Goshen, New York, US | 30 | 2016–2021 |