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Inventor

Hiroyuki Kobatake

Inventor
Tokyo, JP

Overview

52→
Patents
1988–2016
Patent span
Physics
Primary field (CPC G)

Patents· 52 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores46%
H03KPulse technique13%
H10BElectronic memory devices10%
H10DInorganic electric semiconductor devices10%
G01RMeasuring electric variables4%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%
H03MCoding3%
G05FSystems for regulating electric or magnetic variables1%
G11BInformation storage based on relative movement between record carrier and transducer1%
H01LSemiconductor devices1%
PatentTitleYear
9,263,119'Semiconductor device having memory cell with electrostatic capacitance circuit'20169,202,553'Semiconductor storage device'20158,824,189'Semiconductor device'20148,592,942'Non-volatile semiconductor memory device'20138,446,163'Test circuit and test method for testing differential input circuit'20138,432,747'Static random access memory (SRAM) and test method of the SRAM having precharge circuit to prepcharge bit line'20138,208,313'Static random access memory (SRAM) and test method of the SRAM having precharge circuit to precharge bit line'20128,149,640'Differential sense amplifier'20128,144,523'Semiconductor storage device'20128,143,910'Semiconductor integrated circuit and method of testing the same'20128,085,610'SRAM and testing method of SRAM'20117,911,870'Fuse data read circuit having control circuit between fuse and current mirror circuit'20117,518,936'Semiconductor integrated circuit device and inspection method of the same'20096,204,724'Reference voltage generation circuit providing a stable output voltage'20016,115,288'Semiconductor memory device'20006,111,792'Non-volatile semiconductor memory device for selective cell flash erasing/programming'20006,097,630'Non-volatile semiconductor storage device selecting bit lines on voltage divided from word line selection voltage'20006,084,387'Power source circuit for generating positive and negative voltage sources'20006,046,941'Non-volatile semiconductor memory device'20006,009,027'Test method and circuit for semiconductor memory'19995,966,328'Nonvolatile semiconductor memory device having a program area'19995,946,229'Semiconductor device having device supplying voltage higher than power supply voltage'19995,942,808'Semiconductor device with plural power supply circuits, plural internal circuits, and single external terminal'19995,892,258'Read-only semiconductor memory device'19995,880,995'Nonvolatile semiconductor storage including main decoder with predecoder'19995,844,847'Method and Nonvolatile semiconductor memory for repairing over-erased cells'19985,815,441'Non-volatile semiconductor memory device'19985,812,460'Nonvolatile semiconductor memory device having test circuit for testing erasing function thereof'19985,773,872'Semiconductor device having an integrated differential circuit with an improved common-mode rejection ratio (CMRR)'19985,757,717'Semiconductor circuit having circuit supplying voltage higher than power supply voltage'19985,736,951'High speed and high accuracy A/D converter'19985,729,155'High voltage CMOS circuit which protects the gate oxides from excessive voltages'19985,680,132'Digital to analog converter having a string of resistors'19975,508,654'Transistor circuits with a terminal for receiving high voltages and signals'19965,499,183'Constant voltage generating circuit having step-up circuit'19965,477,186'Chopper type differential amplifier using MOS gate capacitors'19955,459,349'Semiconductor device with reduced noise propagation between circuit blocks'19955,281,870'Current controller'19945,198,998'Erasable programmable read only memory'19935,173,874'Semiconductor storage device'19925,134,456'Voltage divider for high-speed high-precision signal converting unit'19925,066,870'Charge pump having pull-up circuit operating with two clock pulse sequences'19915,059,816'High speed booster circuit'19915,057,722'Delay circuit having stable delay time'19914,947,378'Memory element exchange control circuit capable of automatically refreshing a defective address'19904,937,787'Programmable read only memory with means for discharging bit line before program verifying operation'19904,924,438'Non-volatile semiconductor memory including a high voltage switching circuit'19904,910,710'Input circuit incorporated in a semiconductor device'19904,876,462'Control circuit for multipurpose input terminal'19894,847,808'Read only semiconductor memory having multiple bit cells'19894,788,460'Circuit arrangement of sense amplifier for rapid evaluation of logic state'19884,749,880'Circuit for detecting level of input voltage'1988

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1988–2001Patents assigned to NEC CORP (38)· patent assignee history
1988–2001Based in Tokyo, JP· patent location history
2009–2016Based in Kanagawa, JP· patent location history
2011–2016Patents assigned to RENESAS ELECTRONICS CORP (11)· patent assignee history
2011–2014Patents assigned to KOBATAKE HIROYUKI (9)· patent assignee history
2012–2015Based in Kawasaki, JP· patent location history
2013Patents assigned to HIDAKA KENICHI (1)· patent assignee history
2013Patents assigned to KODAMA NORIAKI (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NEC CORP381988–2001
RENESAS ELECTRONICS CORP112011–2016
KOBATAKE HIROYUKIself92011–2014
HIDAKA KENICHI12013
KODAMA NORIAKI12013
Locations
LocationPatentsSpan
Tokyo, JP391988–2001
Kanagawa, JP112009–2016
Kawasaki, JP22012–2015