Inventor

Franz X. Zach

Inventor
Wappingers Falls, NY, US

Overview

25→
Patents
2000–2019
Patent span
Physics
Primary field (CPC G)

Patents· 25 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G03Fprimary
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices48%
G06FElectric digital data processing10%
Y02PClimate change mitigation technologies in the production or processing of goods10%
H10DInorganic electric semiconductor devices8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
G03BApparatus or arrangements for taking photographs or for projecting or viewing them3%
G05BControl or regulating systems in general3%
H01JElectric discharge tubes or discharge lamps3%
PatentTitleYear
10,386,829Systems and methods for controlling an etch process20198,141,008'Optical lithography correction process'20127,923,786'Selective silicon-on-insulator isolation structure and method'20117,882,456'Optical lithography correction process'20117,861,209'Method for interlayer and yield based optical proximity correction'20107,784,019'Yield based retargeting for semiconductor design flow'20107,712,069'Method for interlayer and yield based optical proximity correction'20107,600,212'Method of compensating photomask data for the effects of etch and lithography processes'20097,588,868'Method and system for reducing the impact of across-wafer variations on critical dimension measurements'20097,536,670'Method for verifying and choosing lithography model'20097,444,615'Calibration on wafer sweet spots'20087,392,502'Method for real time monitoring and verifying optical proximity correction model and method'20087,334,212'Method for interlayer and yield based optical proximity correction'20087,326,983'Selective silicon-on-insulator isolation structure and method'20087,246,343'Method for correcting position-dependent distortions in patterning of integrated circuits'20077,224,437'Method for measuring and verifying stepper illumination'20077,189,481'Characterizing flare of a projection lens'20077,124,396'Alternating phase-shift mask rule compliant IC design'20066,961,920'Method for interlayer and yield based optical proximity correction'20056,936,522'Selective silicon-on-insulator isolation structure and method'20056,927,172'Process to suppress lithography at a wafer edge'20056,485,894'Method to self-align a lithographic pattern to a workpiece'20026,270,947'Method and apparatus for reducing non-uniformity area effects in the manufacture of semiconductor devices'20016,204,187'Contact and deep trench patterning'20016,132,940'Method for producing constant profile sidewalls'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2011Patents assigned to IBM (11)· patent assignee history
2000–2011Based in Wappingers Falls, NY, US· patent location history
2001–2005Patents assigned to INFINEON TECHNOLOGIES AG (2)· patent assignee history
2001Patents assigned to INFINEON TECHNOLOGIES CORP (1)· patent assignee history
2007–2008Patents assigned to INVARIUM INC (5)· patent assignee history
2007–2019Based in Los Gatos, CA, US· patent location history
2007Based in Santa Clara, CA, US· patent location history
2009–2012Patents assigned to CADENCE DESIGN SYSTEMS INC (6)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM112000–2011
CADENCE DESIGN SYSTEMS INC62009–2012
INVARIUM INC52007–2008
INFINEON TECHNOLOGIES AG22001–2005
INFINEON TECHNOLOGIES CORP12001
Locations
LocationPatentsSpan
Wappingers Falls, New York, US132000–2011
Los Gatos, California, US102007–2019
Santa Clara, California, US22007