Inventor
Stephen G. Tell
Inventor
Chapel Hill, NC, US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication29%
H03KPulse technique21%
G06FElectric digital data processing17%
G11CStatic stores12%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses6%
G05FSystems for regulating electric or magnetic variables4%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%
H04BTransmission4%
G01RMeasuring electric variables2%
G04FTime-interval measuring2%
PatentTitleYear
11,133,794Signal calibration circuit202110,999,051Reference noise compensation for single-ended signaling202110,965,440Reference noise compensation for single-ended signaling202110,884,465Memory controller with processor for generating interface adjustment signals202110,644,686Self-clocking sampler with reduced metastability202010,601,409Self-clocking sampler with reduced metastability20209,965,008Memory controller with processor for generating interface adjustment signals20189,471,091'Periodic synchronizer using a reduced timing margin to generate a speculative synchronized output signal that is either validated or recalled'20169,164,134'High-resolution phase detector'20159,117,031'Generating interface adjustment signals in a device-to-device interconnection system'20159,100,094'System and method for tuning a serial link'20158,964,919'System and method for determining a time for safely sampling a signal of a clock domain'20158,879,681'System and method for determining a time for safely sampling a signal of a clock domain'20148,782,578'Generating interface adjustment signals in a device-to-device interconnection system'20148,760,204'Variation-tolerant periodic synchronizer'20148,428,207'System and method for determining a time for safely sampling a signal of a clock domain'20138,365,119'Generating interface adjustment signals in a device-to-device interconnection system'20137,817,767'Processor-controlled clock-data recovery'20107,802,212'Processor controlled interface'20107,735,037'Generating interface adjustment signals in a device-to-device interconnection system'20107,664,166'Pleisiochronous repeater system and components thereof'20106,556,628'Methods and systems for transmitting and receiving differential signals over a plurality of conductors'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003Patents assigned to UNIV NORTH CAROLINA (1)· patent assignee history
2003–2021Based in Chapel Hill, NC, US· patent location history
2010–2021Patents assigned to RAMBUS INC (9)· patent assignee history
2013–2021Patents assigned to NVIDIA CORP (12)· patent assignee history
2013Patents assigned to TELL STEPHEN G (2)· patent assignee history
2013Patents assigned to DALLY WILLIAM (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NVIDIA CORP | 12 | 2013–2021 |
| RAMBUS INC | 9 | 2010–2021 |
| TELL STEPHEN Gself | 2 | 2013 |
| DALLY WILLIAM | 1 | 2013 |
| UNIV NORTH CAROLINA | 1 | 2003 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chapel Hill, NC, US | 22 | 2003–2021 |