Inventor
Vikas Kohli
Inventor
Noida, IN
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing83%
G06TImage data processing or generation, in general4%
G09GArrangements or circuits for control of indicating devices using static means to present variable information4%
H03FAmplifiers4%
H05KPrinted circuits4%
PatentTitleYear
10,606,974System and method for dynamic visual guidance of mutually paired components in a circuit design editor202010,289,788System and method for suggesting components associated with an electronic design201910,285,276Method and apparatus to drive layout of arbitrary EM-coil through parametrized cell20199,619,605'System and method for automatically enforcing schematic layout strategy selectively applied to schematic objects'20179,361,415'Method, system, and computer program product for implementing a multi-fabric electronic design spanning across multiple design fabrics'20169,348,960'Method, system, and computer program product for probing or netlisting a multi-fabric electronic design spanning across multiple design fabrics'20169,280,621'Methods, systems, and articles of manufacture for analyzing a multi-fabric electronic design and displaying analysis results for the multi-fabric electronic design spanning and displaying simulation results across multiple design fabrics'20169,223,915'Method, system, and computer program product for checking, verifying, or testing a multi-fabric electronic design spanning across multiple design fabrics'20159,202,006'System and method for connecting components in an electronic design'20159,122,384'System and method for maintaining dynamic visual cue for associated circuitry of schematic object'20158,527,929'Method and system for optimally connecting interfaces across multiple fabrics'20138,479,134'Method and system for specifying system level constraints in a cross-fabric design environment'20138,438,524'Hierarchical editing of printed circuit board pin assignment'20138,316,337'Method and system for optimally placing and assigning interfaces in a cross-fabric design environment'20128,316,342'Method and apparatus for concurrent design of modules across different design entry tools targeted to a single layout'20128,271,933'Pin unspecific device planning for printed circuit board layout'20127,990,375'Virtual view schematic editor'20117,168,041'Method and apparatus for table and HDL based design entry'20077,143,341'Method and apparatus for concurrent engineering and design synchronization of multiple tools'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2020Based in Noida, IN· patent location history
2007–2020Patents assigned to CADENCE DESIGN SYSTEMS INC (18)· patent assignee history
2012–2013Patents assigned to KOHLI VIKAS (6)· patent assignee history
2012–2013Patents assigned to BERI TARUN (3)· patent assignee history
2012–2013Patents assigned to BHATTACHARYA UTPAL (3)· patent assignee history
2012–2013Patents assigned to VERMA RAHUL (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| CADENCE DESIGN SYSTEMS INC | 18 | 2007–2020 |
| KOHLI VIKASself | 6 | 2012–2013 |
| BERI TARUN | 3 | 2012–2013 |
| BHATTACHARYA UTPAL | 3 | 2012–2013 |
| VERMA RAHUL | 3 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Noida, IN | 19 | 2006–2020 |