Inventor
Tom D. Yiu
Inventor
Milpitas, CA, US
Overview
Patents· 32 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores54%
H10BElectronic memory devices21%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
G06FElectric digital data processing6%
G08GTraffic control systems6%
G05FSystems for regulating electric or magnetic variables2%
H10DInorganic electric semiconductor devices2%
PatentTitleYear
7,123,537'Decoder arrangement of a memory cell array'20066,166,956'Fast flash EPROM programming and pre-programming circuit design'20006,031,771'Memory redundancy circuit using single polysilicon floating gate transistors as redundancy elements'20005,949,704'Stacked read-only memory'19995,866,940'Semiconductor device'19995,847,449'Semiconductor device'19985,825,083'Semiconductor device'19985,821,909'Fast flash EPROM programming and pre-programming circuit design'19985,818,848'Automatic test circuitry with non-volatile status write'19985,818,764'Block-level wordline enablement to reduce negative wordline stress'19985,778,440'Floating gate memory device and method for terminating a program load cycle upon detecting a predetermined address/data pattern'19985,745,410'Method and system for soft programming algorithm'19985,700,975'Semiconductor device'19975,691,945'Technique for reconfiguring a high density memory'19975,691,938'Non-volatile memory cell and array architecture'19975,668,758'Decoded wordline driver with positive and negative voltage modes'19975,633,185'Method of making a non-volatile memory cell'19975,627,838'Automatic test circuitry with non-volatile status write'19975,618,742'Method of making flash EPROM with conductive sidewall spacer contacting floating gate'19975,615,153'Fast flash EPROM programming and pre-programming circuit design'19975,563,823'Fast FLASH EPROM programming and pre-programming circuit design'19965,563,822'Fast flash EPROM programming and pre-programming circuit design'19965,563,844'Architecture for accessing very high density memory device'19965,544,116'Erase and program verification circuit for non-volatile memory'19965,539,688'Fast pre-programming circuit for floating gate memory'19965,528,546'Erase and program verification circuit for non-volatile memory'19965,526,307'Flash EPROM integrated circuit architecture'19965,463,586'Erase and program verification circuit for non-volatile memory'19955,453,391'Method for manufacturing a contactless floating gate transistor array'19955,420,798'Supply voltage detection circuit'19955,399,891'Floating gate or flash EPROM transistor array having contactless source and drain diffusions'19955,117,389'Flat-cell read-only-memory integrated circuit'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992–2006Patents assigned to MACRONIX INT CO LTD (23)· patent assignee history
1992–2006Based in Milpitas, CA, US· patent location history
1996–1999Patents assigned to MEGA CHIPS CORP (5)· patent assignee history
1996–1999Patents assigned to YIU TOM DANG HSING (5)· patent assignee history
1997Patents assigned to MACRONIX INT L CO LTD (1)· patent assignee history
1997Patents assigned to MACRONIX INTERNATIOAL LTD (1)· patent assignee history
1998Based in Saratoga, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MACRONIX INT CO LTD | 23 | 1992–2006 |
| MEGA CHIPS CORP | 5 | 1996–1999 |
| YIU TOM DANG HSINGself | 5 | 1996–1999 |
| MACRONIX INT L CO LTD | 1 | 1997 |
| MACRONIX INTERNATIOAL LTD | 1 | 1997 |
Locations
| Location | Patents | Span |
|---|---|---|
| Milpitas, California, US | 31 | 1992–2006 |
| Saratoga, California, US | 1 | 1998 |