Inventor
Noriaki Fujiki
Inventor
Tokyo, JP
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1034%
B60WConjoint control of vehicle sub-units of different type or different function13%
B60TVehicle brake control systems or parts thereof8%
G05DSystems for controlling or regulating non-electric variables8%
G08GTraffic control systems8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
A61KPreparations for medical, dental or toiletry purposes3%
A61PSpecific therapeutic activity of chemical compounds or medicinal preparations3%
B60KArrangement or mounting of propulsion units or of transmissions in vehicles3%
PatentTitleYear
10,894,043Pharmaceutical composition202110,604,150Vehicle stop position setting apparatus and method202010,509,408Drive planning device, travel assistance apparatus, and drive planning method201910,074,275Scene determination device, travel assistance apparatus, and scene determination method20189,452,747'Vehicle braking control device'20169,002,609'Vehicle brake control system'20158,670,914'Vehicle brake control system'20147,423,301'Semiconductor device including fuse elements and bonding pad'20087,335,537'Method of manufacturing semiconductor device including bonding pad and fuse elements'20087,217,965'Semiconductor device including fuse elements and bonding pad'20076,888,258'Semiconductor device including copper interconnect line and bonding pad, and method of manufacturing the same'20056,677,682'Multilayer interconnection structure including an alignment mark'20046,586,838'Semiconductor device'20036,339,257'Semiconductor device'20026,283,835'Method and apparatus for manufacturing a semiconductor integrated circuit'20016,178,972'Method and apparatus for manufacturing a semiconductor integrated circuit'20015,736,791'Semiconductor device and bonding pad structure therefor'19985,510,653'Semiconductor device including silicon ladder resin layer'19965,488,014'Interconnection structure of semiconductor integrated circuit device and manufacturing method thererfor'19965,313,101'Interconnection structure of semiconductor integrated circuit device'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2003Patents assigned to MITSUBISHI ELECTRIC CORP (8)· patent assignee history
1994–2002Based in Hyogo, JP· patent location history
2001Based in Itami, JP· patent location history
2003–2021Based in Tokyo, JP· patent location history
2004–2008Patents assigned to RENESAS TECH CORP (5)· patent assignee history
2014–2020Patents assigned to NISSAN MOTOR (6)· patent assignee history
2014–2015Patents assigned to AJIRO KEIGO (2)· patent assignee history
2014–2015Patents assigned to FUJIKI NORIAKI (2)· patent assignee history
2014–2016Based in Ebina, JP· patent location history
2018–2020Based in Kanagawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 8 | 1994–2003 |
| NISSAN MOTOR | 6 | 2014–2020 |
| RENESAS TECH CORP | 5 | 2004–2008 |
| AJIRO KEIGO | 2 | 2014–2015 |
| FUJIKI NORIAKIself | 2 | 2014–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 7 | 2003–2021 |
| Hyogo, JP | 5 | 1994–2002 |
| Kanagawa, JP | 3 | 2018–2020 |
| Ebina, JP | 3 | 2014–2016 |
| Itami, JP | 2 | 2001 |