LexDanaLexDanabeta
Inventor

Michael M. DeSmith

Inventor
Beaverton, OR, US

Overview

6→
Patents
2004–2012
Patent span
Electricity
Primary field (CPC H)

Patents· 6 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1023%
H01GCapacitors15%
H05KPrinted circuits15%
Y02PClimate change mitigation technologies in the production or processing of goods15%
G06FElectric digital data processing8%
G11CStatic stores8%
H03KPulse technique8%
H10DInorganic electric semiconductor devices8%
PatentTitleYear
8,166,215'Method to control delay between lanes'20127,317,238'Intrinsic decoupling capacitor'20087,286,368'System to control effective series resistance of decoupling capacitor'20077,211,894'Capacitor-related systems for addressing package/motherboard resonance'20076,992,387'Capacitor-related systems for addressing package/motherboard resonance'20066,781,434'Low charge-dump transistor switch'2004

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2004–2012Patents assigned to INTEL CORP (6)· patent assignee history
2004–2012Based in Beaverton, OR, US· patent location history
2012Patents assigned to DESMITH MICHAEL M (1)· patent assignee history
2012Patents assigned to FIGUEROA DAVID G (1)· patent assignee history
2012Patents assigned to KAR JAYASHREE (1)· patent assignee history
2012Patents assigned to PATEL PRIYAVADAN RAMDAS (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP62004–2012
DESMITH MICHAEL Mself12012
FIGUEROA DAVID G12012
KAR JAYASHREE12012
PATEL PRIYAVADAN RAMDAS12012
Locations
LocationPatentsSpan
Beaverton, OR, US62004–2012