Inventor
NITIN A. DESHPANDE
Inventor
US
Overview
Patents· 30 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1039%
H01LSemiconductor devices36%
G02BOptical elements, systems or apparatus10%
H10DInorganic electric semiconductor devices3%
B81BMicrostructural devices or systems, e.g. micromechanical devices1%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems1%
H01QAntennas, i.e. radio aerials1%
H03FAmplifiers1%
H04BTransmission1%
H04WWireless communication networks1%
PatentTitleYear
12,599,034Microelectronic structure including active base substrate with through vias between a top die and a bottom die supported on an interposer202612,591,092Covered cavity for a photonic integrated circuit (PIC)202612,525,545HBI die fiducial architecture with cantilever fiducials for smaller die size and better yields202612,506,128Package architecture of scalable compute wall having compute bricks with vertically stacked dies202512,506,085HBI die architecture with fiducial in street for no metal depopulation in active die202512,506,127Package architecture of photonic system with vertically stacked dies having planarized edges202512,438,093Microelectronic structures including bridges202512,422,615Nested glass packaging architecture for hybrid electrical and optical communication devices202512,412,842Microelectronic structures including bridges202512,399,334Photonic integrated circuit packaging architectures202512,392,970Photonic integrated circuit packaging architectures202512,272,650Microelectronic package with substrate cavity for bridge-attach202512,243,792Microelectronic structures including bridges202512,181,710Photonic integrated circuit packaging architecture202412,183,596Low cost package warpage solution202412,148,742Active bridge enabled co-packaged photonic transceiver202412,113,023Microelectronic structures including bridges202411,923,307Microelectronic structures including bridges202411,887,962Microelectronic structures including bridges202411,854,945Underfill material flow control for reduced die-to-die spacing in semiconductor packages202311,804,441Microelectronic structures including bridges202311,791,274Multichip semiconductor package including a bridge die disposed in a cavity having non-planar interconnects202311,764,080Low cost package warpage solution202311,735,558Microelectronic structures including bridges202311,522,291Antenna boards and communication devices202211,521,931Microelectronic structures including bridges202211,373,972Microelectronic structures including bridges202211,328,937Low cost package warpage solution202211,254,563Mold material architecture for package device structures202211,222,877Thermally coupled package-on-package semiconductor packages2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2026Patents assigned to INTEL CORP (29)· patent assignee history
2022–2026Based in US· patent location history
2023Patents assigned to TAHOE RES LTD (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 29 | 2022–2026 |
| TAHOE RES LTD | 1 | 2023 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 30 | 2022–2026 |