Inventor
YI-RUEI JHAN
Inventor
TW
Overview
Patents· 38 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices29%
H01LSemiconductor devices25%
B82YSpecific uses or applications of nanostructures19%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1012%
C23CCoating metallic material2%
H10BElectronic memory devices1%
PatentTitleYear
12,588,234Semiconductor devices with implanted STI regions and methods of forming the same202612,563,816Method for forming sidewall spacers disposed above mask layer and semiconductor devices fabricated thereof202612,557,317Semiconductor devices with fin-top hard mask and methods for fabrication thereof202612,490,506Semiconductor device structure with air gap and method for forming the same202512,439,680Multi-gate device and related methods202512,376,354Semiconductor and method for manufacturing the same202512,376,366Semiconductor device and method of manufacturing the same202512,369,366Convergent fin and nanostructure transistor structure and method202512,349,407Method for manufacturing semiconductor structure with dielectric feature202512,349,456Semiconductor device structure and methods of forming the same202512,349,378Semiconductor devices with Fin-top hard mask and methods for fabrication thereof202512,317,528Gate isolation feature and manufacturing method thereof202512,237,405Semiconductor devices and methods of manufacturing thereof202512,224,210Method for FinFet fabrication and structure thereof202512,218,218Nanostructures formed over a substrate and a gate structure wrapping around the nanostructures202512,205,985Field effect transistor with inactive fin and method202512,199,097Seam free isolation structures and method for making the same202512,087,832Semiconductor device interconnects and methods of formation202412,080,776Field effect transistor with fin isolation structure and method202412,074,164FinFET pitch scaling202412,068,320Gate isolation for multigate device202412,033,863Semiconductor fabrication system embedded with effective baking module202412,021,136Gate isolation feature and manufacturing method thereof202411,996,332Semiconductor device and method of manufacturing the same202411,990,374Method for forming sidewall spacers and semiconductor devices fabricated thereof202411,908,685Methods of reducing gate spacer loss during semiconductor manufacturing202411,854,908Multi-gate device and related methods202311,799,019Gate isolation feature and manufacturing method thereof202311,757,021Semiconductor devices with fin-top hard mask and methods for fabrication thereof202311,646,234Method for FinFET fabrication and structure thereof202311,621,195Semiconductor device and method of manufacturing the same202311,569,234Semiconductor device structure and methods of forming the same202311,532,725Method for forming sidewall spacers and semiconductor devices fabricated thereof202211,532,732Multi-gate device and method of fabrication thereof202211,527,533FinFET pitch scaling202211,495,677Semiconductor devices and methods of manufacturing thereof202211,328,963Multi-gate device and related methods202211,222,794Semiconductor fabrication system embedded with effective baking module2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (38)· patent assignee history
2022–2026Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 38 | 2022–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 38 | 2022–2026 |