Inventor

Chin-Hsi Lin

Inventor
Hsinchu, TW

Overview

33→
Patents
1994–2009
Patent span
Physics
Primary field (CPC G)

Patents· 33 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores72%
H10BElectronic memory devices19%
H10DInorganic electric semiconductor devices5%
E03FSewers2%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
7,548,445'Over-driven access method and device for ferroelectric memory'20097,453,714'Over-driven access method and device for ferroelectric memory'20087,394,678'Over-driven access method and device for ferroelectric memory'20087,382,652'NAND flash memory and blank page search method therefor'20087,307,867'Over-driven access method and device for ferroelectric memory'20077,233,527'Nonvolatile memory structure'20077,227,232'Contactless mask programmable ROM'20077,200,038'Nonvolatile memory structure'20077,161,850'NAND flash memory and blank page search method therefor'20077,119,394'Nonvolatile memory device and method for fabricating the same'20067,094,649'Method for forming multi-level mask ROM cell and NAND multi-level mask ROM'20067,088,605'FeRAM memory design using ROM array architecture'20067,085,160'NAND flash memory and blank page search method therefor'20067,061,042'Double-cell memory device'20067,046,549'Nonvolatile memory structure'20067,020,018'Nonvolatile memory device and method for fabricating the same'20067,015,553'Compact mask programmable ROM'20066,987,298'Circuit layout and structure for a non-volatile memory'20066,804,140'Capacitance sensing method of reading a ferroelectric RAM'20046,757,186'Method and logic decision device for generating ferro-electric capacitor reference voltage'20046,700,811'Random access memory device and method for driving a plate line segment therein'20046,621,756'Compact integrated circuit with memory array'20036,525,361'Process and integrated circuit for a multilevel memory cell with an asymmetric drain'20036,404,678'Source and drain sensing'20026,396,730'Non-volatile memory cell and sensing method'20026,292,395'Source and drain sensing'20016,181,604'Method for fast programming of EPROMS and multi-level flash EPROMS'20016,178,118'Electrically programmable semiconductor device with multi-level wordline voltages for programming multi-level threshold voltages'20016,175,519'Virtual ground EPROM structure'20016,046,934'Method and device for multi-level programming of a memory cell'20006,028,790'Method and device for programming a non-volatile memory cell by controlling source current pulldown rate'20005,959,892'Apparatus and method for programming virtual ground EPROM array cell without disturbing adjacent cells'19995,323,804'Bug-proof and odor-proof draining outlet structure'1994

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1994Patents assigned to LIN CHIN HSI (1)· patent assignee history
1994Based in Changhua County, TW· patent location history
1999–2009Patents assigned to MACRONIX INT CO LTD (19)· patent assignee history
1999–2009Based in Hsinchu, TW· patent location history
2000–2002Based in Nei Hu, TW· patent location history
2006–2008Patents assigned to SOLID STATE SYSTEM CO LTD (13)· patent assignee history
2006–2008Based in Jubei, TW· patent location history
2008Patents assigned to TOSHIBA KK (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MACRONIX INT CO LTD191999–2009
SOLID STATE SYSTEM CO LTD132006–2008
LIN CHIN HSIself11994
TOSHIBA KK12008
Locations
LocationPatentsSpan
Hsinchu, TW261999–2009
Jubei, TW32006–2008
Nei Hu, TW32000–2002
Changhua County, TW11994