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Inventor

Kun-Lung Chen

Inventor
Taipei, TW

Overview

20→
Patents
2007–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores18%
G06FElectric digital data processing13%
H10DInorganic electric semiconductor devices11%
H03KPulse technique8%
H10BElectronic memory devices8%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
G01NInvestigating or analysing materials by determining their chemical or physical properties5%
H01LSemiconductor devices5%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems5%
B81BMicrostructural devices or systems, e.g. micromechanical devices3%
PatentTitleYear
10,852,271On-chip heater202010,715,137Generating high dynamic voltage boost202010,712,333Semiconductor device for determining a biomolecule characteristic202010,523,183Dynamic high voltage (HV) level shifter with temperature compensation for high-side gate driver20199,012,967'1T MIM memory for embedded RAM application in soc'20158,587,077'Integrated compact MEMS device with deep trench contacts'20138,261,219'System on chip development with reconfigurable multi-project wafer technology'20128,148,223'1T MIM memory for embedded ram application in soc'20127,797,646'Method for using mixed multi-Vt devices in a cell-based design'20107,701,755'Memory having improved power design'20107,577,052'Power switching circuit'20097,564,709'Method and system for utilizing DRAM components in a system-on-chip'20097,535,788'Dynamic power control for expanding SRAM write margin'20097,484,138'Method and system for improving reliability of memory device'20097,468,903'Circuits for improving read and write margins in multi-port SRAMS'20087,460,391'Write VCCMIN improvement scheme'20087,401,302'System on chip development with reconfigurable multi-project wafer technology'20087,350,177'Configurable logic and memory devices'20087,281,230'Method of using mixed multi-Vt devices in a cell-based design'20077,161,845'Static random access memory device having a memory cell with multiple bit-elements'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2012Patents assigned to TAIWAN SEMICONDUCTOR MFG (14)· patent assignee history
2007–2015Based in Taipei, TW· patent location history
2012–2015Patents assigned to CHEN KUN-LUNG (4)· patent assignee history
2012–2015Patents assigned to CHEN CHUN-YAO (2)· patent assignee history
2012–2015Patents assigned to HUANG CHIEN-HUA (2)· patent assignee history
2013–2020Based in Hsinchu, TW· patent location history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (5)· patent assignee history
2019–2020Based in Jhubei City, TW· patent location history
2020Based in Hsinchu County, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG142007–2012
TAIWAN SEMICONDUCTOR MFG CO LTD52015–2020
CHEN KUN-LUNGself42012–2015
CHEN CHUN-YAO22012–2015
HUANG CHIEN-HUA22012–2015
Locations
LocationPatentsSpan
Taipei, TW152007–2015
Jhubei City, TW22019–2020
Hsinchu, TW22013–2020
Hsinchu County, TW12020