Inventor
Yasuhiko Saigou
Inventor
Fuchu, JP
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing50%
G11CStatic stores50%
PatentTitleYear
5,287,484'Multi-processor system for invalidating hierarchical cache'19945,267,198'Static memory containing sense amp and sense amp switching circuit'19935,202,969'Single-chip-cache-buffer for selectively writing write-back and exclusively writing data-block portions to main-memory based upon indication of bits and bit-strings respectively'19935,193,075'Static memory containing sense AMP and sense AMP switching circuit'19935,146,573'Single chip cache with partial-write circuit for transferring a preselected portion of data between memory and buffer register'19925,140,681'Multi-processing system and cache apparatus for use in the same'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992–1994Patents assigned to HITACHI LTD (6)· patent assignee history
1992–1994Patents assigned to HITACHI VLSI ENG (5)· patent assignee history
1992–1994Based in Fuchu, JP· patent location history
1992–1993Based in Fuchuu, JP· patent location history
1993Patents assigned to HITACHI VLSI ENGINEERING (1)· patent assignee history
1993Based in Tokyo, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HITACHI LTD | 6 | 1992–1994 |
| HITACHI VLSI ENG | 5 | 1992–1994 |
| HITACHI VLSI ENGINEERING | 1 | 1993 |
Locations
| Location | Patents | Span |
|---|---|---|
| Fuchu, JP | 2 | 1992–1994 |
| Tokyo, JP | 2 | 1993 |
| Fuchuu, JP | 2 | 1992–1993 |