Inventor
CHI-WEN CHANG
Inventor
TW
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing30%
H01LSemiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices10%
H10DInorganic electric semiconductor devices10%
H10NElectric solid-state devices not otherwise provided for10%
PatentTitleYear
12,505,272Region based shrinking methodology for integrated circuit layout migration202512,293,970Semiconductor structure and method for manufacturing thereof202511,532,613Structure and method for cooling three-dimensional integrated circuits202211,455,453Integrated circuit design method, system and computer program product202211,275,880Region based shrinking methodology for integrated circuit layout migration2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2025Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (5)· patent assignee history
2022–2025Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 5 | 2022–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 5 | 2022–2025 |