Inventor

Satoru Isomura

Inventor

Hamura, JP

Overview

1990–2007

Patent span

Electricity

Primary field (CPC H)

Patents· 23 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices24%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%

H03KPulse technique12%

H10BElectronic memory devices10%

G11CStatic stores8%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%

G06FElectric digital data processing4%

H05KPrinted circuits4%

G01RMeasuring electric variables2%

H04BTransmission2%

PatentTitleYear

7,216,269'Signal transmit-receive device, circuit, and loopback test method'2007 6,937,068'Semiconductor integrated circuit'2005 6,911,734'Semiconductor device and electronic device'2005 6,911,733'Semiconductor device and electronic device'2005 6,760,895'Design method of semiconductor device'2004 6,636,075'Semiconductor integrated circuit and its fabrication method'2003 6,530,066'Method of computing wiring capacitance, method of computing signal propagation delay due to cross talk and computer-readable recording medium storing such computed data'2003 6,359,472'Semiconductor integrated circuit and its fabrication method'2002 6,194,915'Semiconductor integrated circuit device and process for manufacturing the same'2001 6,034,912'Semiconductor integrated circuit device and method of manufacturing the same'2000 5,898,636'Semiconductor integrated circuit device with interleaved memory and logic blocks'1999 5,661,329'Semiconductor integrated circuit device including an improved separating groove arrangement'1997 5,477,067'Semiconductor IC device having a RAM interposed between different logic sections and by-pass signal lines extending over the RAM for mutually connecting the logic sections'1995 5,428,312'ECL interface circuit'1995 5,396,198'Electronic circuit device having a series connection of resistor and capacitance as a noise reducing circuit connected to a power source wiring'1995 5,367,490'Semiconductor integrated circuit device with two variable delay lines in writing circuit control'1994 5,341,049'Integrated circuit having alternate rows of logic cells and I/O cells'1994 5,306,948'Semiconductor device and semiconductor module having auxiliary high power supplying terminals'1994 5,243,208'Semiconductor integrated circuit device having a gate array with a ram and by-pass signal lines which interconnect a logic section and I/O unit circuit of the gate array'1993 5,103,282'Semiconductor integrated circuit device having a gate array with a RAM and by-pass signal lines which interconnect a logic section and I/O unit circuit of the gate array'1992 5,014,242'Semiconductor device for a ram disposed on chip so as to minimize distances of signal paths between the logic circuits and memory circuit'1991 4,959,704'Semiconductor integrated circuit device'1990 4,949,162'Semiconductor integrated circuit with dummy pedestals'1990

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1990–2005Patents assigned to HITACHI LTD (22)· patent assignee history

1990–2007Based in Hamura, JP· patent location history

1990Based in Nishitama-gun, JP· patent location history

1991–1994Patents assigned to HITACHI MICROCUMPUTER ENG (2)· patent assignee history

1991–1995Based in Tokyo, JP· patent location history

1994–2000Based in Ohme, JP· patent location history

1994–1995Based in Ome, JP· patent location history

2007Patents assigned to RENESAS TECH CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
HITACHI LTD	22	1990–2005
HITACHI MICROCUMPUTER ENG	2	1991–1994
RENESAS TECH CORP	1	2007

Locations

Location	Patents	Span
Hamura, JP	10	1990–2007
Ohme, JP	5	1994–2000
Tokyo, JP	5	1991–1995
Ome, JP	2	1994–1995
Nishitama-gun, JP	1	1990