Inventor
Shinji Emori
Inventor
Urawa, JP
Overview
Patents· 13 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique38%
H05KPrinted circuits19%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1019%
H01PWaveguides5%
H04JMultiplex communication5%
H04LTransmission of digital information, e.g. telegraphic communication5%
H10DInorganic electric semiconductor devices5%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
PatentTitleYear
5,270,586'Controllable delay logic circuit for providing variable delay time'19935,128,673'Signal generator for generating a delayed clock signal'19925,001,361'Master-slave flip-flop circuit'19914,933,576'Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit'19904,928,024'Referenceless ECL logic circuit'19904,920,406'Semiconductor device'19904,875,087'Integrated circuit device having strip line structure therein'19894,827,327'Integrated circuit device having stacked conductive layers connecting circuit elements therethrough'19894,757,368'Semiconductor device having electric contacts with precise resistance values'19884,748,346'Driver for differential signal transmission'19884,748,350'Emitter-coupled logic circuit'19884,725,878'Semiconductor device'19884,587,444'Variable-threshold-type differential signal receiver'1986Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1986–1993Patents assigned to FUJITSU LTD (13)· patent assignee history
1986–1993Based in Urawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FUJITSU LTD | 13 | 1986–1993 |
Locations
| Location | Patents | Span |
|---|---|---|
| Urawa, JP | 13 | 1986–1993 |