Inventor
Jonathan Lin
Inventor
Milpitas, CA, US
Overview
Patents· 43 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing15%
G11CStatic stores9%
H04LTransmission of digital information, e.g. telegraphic communication9%
G01NInvestigating or analysing materials by determining their chemical or physical properties8%
H10BElectronic memory devices7%
Y10TTechnical subjects covered by former us classification6%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses5%
H04JMultiplex communication5%
H10DInorganic electric semiconductor devices5%
G09FDisplaying4%
PatentTitleYear
10,824,195Glass touch screen protector202010,767,810Electronic device holder202010,684,211Multi-modal fluorescence imaging flow cytometry system202010,663,108Holder202010,620,111Cell sorting using a high throughput fluorescence flow cytometer202010,401,988Touch screen protector201910,324,019Cell sorting using a high throughput fluorescence flow cytometer201910,288,546Multi-modal fluorescence imaging flow cytometry system201910,078,045Multi-modal fluorescence imaging flow cytometry system20189,582,040'Touch screen protector'20179,582,039'Touch screen protector'20179,283,731'Touch screen protector'20168,867,046'Method and apparatus for measuring a position of a particle in a flow'20148,319,965'Method and apparatus for measuring a position of a particle in a flow'20128,044,942'Touch screen protector'20117,821,636'Method and apparatus for measuring a position of a particle in a flow'20107,779,400'System and method for modifying firmware of an optical storage medium device without requiring a compiling process'20107,681,174'Computer system and related method for generating program codes describing relationships of numerous function names and numerous control codes of a device'20107,366,512'Notification method and device for service providers'20087,308,568'Network interface with double date rate and delay locked loop'20077,134,010'Network interface with double data rate and delay locked loop'20067,068,652'Pointer based binary search engine and method for use in network devices'20067,024,576'Network interface using programmable delay and frequency doubler'20067,010,535'Binary search engine and method'20066,981,058'System and method for slot based ARL table learning with concurrent table search using write snoop'20056,965,945'System and method for slot based ARL table learning and concurrent table search using range address insertion blocking'20056,934,866'Network interface using programmable delay and frequency doubler'20056,920,552'Network interface with double data rate and delay locked loop'20056,813,620'Binary search engine and method'20046,211,022'Field leakage by using a thin layer of nitride deposited by chemical vapor deposition'20015,908,308'Use of borophosphorous tetraethyl orthosilicate (BPTEOS) to improve isolation in a transistor array'19995,801,551'Depletion mode pass gates with controlling decoder and negative power supply for a programmable logic device'19985,789,269'Field implant for semiconductor device'19985,754,471'Low power CMOS array for a PLD with program and erase using controlled avalanche injection'19985,742,542'Non-volatile memory cells using only positive charge to store data'19985,700,698'Method for screening non-volatile memory and programmable logic devices'19975,666,309'Memory cell for a programmable logic device (PLD) avoiding pumping programming voltage above an NMOS threshold'19975,646,901'CMOS memory cell with tunneling during program and erase through the NMOS and PMOS transistors and a pass gate separating the NMOS and PMOS transistors'19975,615,150'Control gate-addressed CMOS non-volatile cell that programs through gates of CMOS transistors'19975,604,370'Field implant for semiconductor device'19975,596,524'CMOS memory cell with gate oxide of both NMOS and PMOS transistors as tunneling window for program and erase'19975,594,687'Completely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and erase'19975,587,945'CMOS EEPROM cell with tunneling window in the read path'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–2001Patents assigned to ADVANCED MICRO DEVICES INC (14)· patent assignee history
1996–2001Based in Milpitas, CA, US· patent location history
2004–2007Patents assigned to BROADCOM CORP (8)· patent assignee history
2004–2007Based in Fremont, CA, US· patent location history
2010–2014Patents assigned to MASSACHUSETTS INST TECHNOLOGY (3)· patent assignee history
2010–2020Based in Taipei, TW· patent location history
2011–2020Based in Mountain View, CA, US· patent location history
2017–2020Patents assigned to AEVOE CORP (4)· patent assignee history
2018–2020Patents assigned to Omega Biosystems Incorporated (3)· patent assignee history
2018–2020Based in Los Angeles, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ADVANCED MICRO DEVICES INC | 14 | 1996–2001 |
| BROADCOM CORP | 8 | 2004–2007 |
| AEVOE CORP | 4 | 2017–2020 |
| MASSACHUSETTS INST TECHNOLOGY | 3 | 2010–2014 |
| Omega Biosystems Incorporated | 3 | 2018–2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Milpitas, California, US | 14 | 1996–2001 |
| Fremont, California, US | 10 | 2004–2007 |
| Mountain View, California, US | 5 | 2011–2020 |
| Los Angeles, California, US | 5 | 2018–2020 |
| Taipei, TW | 4 | 2010–2020 |