Inventor
Jaroslaw A. Magera
Inventor
Palatine, IL, US
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H05Kprimary
H05KPrinted circuits50%
Y10TTechnical subjects covered by former us classification25%
C23FNon-mechanical removal of metallic material from surface8%
H01GCapacitors8%
H01RElectrically-conductive connections8%
PatentTitleYear
7,557,304'Printed circuit board having closed vias'20097,459,202'Printed circuit board'20087,451,540'Method for fabricating a printed circuit board'20087,427,562'Method for fabricating closed vias in a printed circuit board'20087,361,847'Capacitance laminate and printed circuit board apparatus and method'20087,138,068'Printed circuit patterned embedded capacitance layer'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2009Patents assigned to MOTOROLA INC (6)· patent assignee history
2006–2009Based in Palatine, IL, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MOTOROLA INC | 6 | 2006–2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Palatine, Illinois, US | 6 | 2006–2009 |