Inventor
Prakash Rau Mokhna Rau
Inventor
Boise, ID, US
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices25%
H10BElectronic memory devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H10DInorganic electric semiconductor devices13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
PatentTitleYear
11,101,280Memory arrays and methods used in forming a memory array202111,037,944Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias202110,985,179Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias202110,304,749Method and apparatus for improved etch stop layer or hard mask layer of a memory device2019Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2019Patents assigned to INTEL CORP (1)· patent assignee history
2019–2021Based in Boise, ID, US· patent location history
2021Patents assigned to MICRON TECHNOLOGY INC (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 3 | 2021 |
| INTEL CORP | 1 | 2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Boise, ID, US | 4 | 2019–2021 |