Inventor

Min-Chul Sun

Inventor

Seoul, KR

Overview

2004–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 28 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices30%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1026%

H01LSemiconductor devices16%

H10BElectronic memory devices8%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%

B82YSpecific uses or applications of nanostructures4%

G06FElectric digital data processing3%

G01RMeasuring electric variables1%

PatentTitleYear

10,615,080Methods of manufacturing semiconductor devices by etching active fins using etching masks2020 10,529,801Semiconductor device including isolation regions2020 10,256,352Structures for nitride vertical transistors2019 10,109,532Methods of manufacturing finFET semiconductor devices2018 10,014,219Semiconductor device2018 9,634,093'Method for fabricating semiconductor device'2017 9,583,583'Semiconductor device with nanowires in different regions at different heights'2017 9,570,600'Semiconductor structure and recess formation etch technique'2017 9,461,054'Semiconductor devices having vertical device and non-vertical device and methods of forming the same'2016 9,343,549'Semiconductor device and method for fabricating the same'2016 9,219,119'Semiconductor device with nanowires in different regions at different heights and fabricating method thereof'2015 9,087,922'Semiconductor devices having vertical device and non-vertical device and methods of forming the same'2015 8,928,080'Field-effect transistor having back gate and method of fabricating the same'2015 8,557,691'Method of fabricating semiconductor device having buried wiring and related device'2013 8,481,392'Methods of fabricating semiconductor device using high-K layer for spacer etch stop and related devices'2013 7,928,482'Gate structure'2011 7,790,622'Methods for removing gate sidewall spacers in CMOS semiconductor fabrication processes'2010 7,781,322'Nickel alloy salicide transistor structure and method for manufacturing same'2010 7,772,866'Structure and method of mapping signal intensity to surface voltage for integrated circuit inspection'2010 7,679,083'Semiconductor integrated test structures for electron beam inspection of semiconductor wafers'2010 7,501,651'Test structure of semiconductor device'2009 7,465,617'Method of fabricating a semiconductor device having a silicon oxide layer, a method of fabricating a semiconductor device having dual spacers, a method of forming a silicon oxide layer on a substrate, and a method of forming dual spacers on a conductive material layer'2008 7,317,204'Test structure of semiconductor device'2008 7,307,320'Differential mechanical stress-producing regions for integrated circuit field effect transistors'2007 7,232,756'Nickel salicide process with reduced dopant deactivation'2007 7,084,061'Methods of fabricating a semiconductor device having MOS transistor with strained channel'2006 7,005,367'Method of fabricating a semiconductor device having a silicon oxide layer, a method of fabricating a semiconductor device having dual spacers, a method of forming a silicon oxide layer on a substrate, and a method of forming dual spacers on a conductive material layer'2006 6,797,559'Method of fabricating semiconductor device having metal conducting layer'2004

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2004–2020Patents assigned to SAMSUNG ELECTRONICS CO LTD (26)· patent assignee history

2007–2011Based in Hwaseong-si, KR· patent location history

2008–2010Patents assigned to IBM (4)· patent assignee history

2008–2010Based in Suwon-si, KR· patent location history

2010–2020Based in Yongin-si, KR· patent location history

2013–2015Patents assigned to PARK BYUNG-GOOK (4)· patent assignee history

2013–2015Patents assigned to SUN MIN-CHUL (4)· patent assignee history

2013–2018Based in Seoul, KR· patent location history

2015–2017Patents assigned to UNIV SEOUL NAT R & DB FOUND (4)· patent assignee history

2017–2019Based in Cambridge, MA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
SAMSUNG ELECTRONICS CO LTD	26	2004–2020
IBM	4	2008–2010
PARK BYUNG-GOOK	4	2013–2015
SUN MIN-CHULself	4	2013–2015
UNIV SEOUL NAT R & DB FOUND	4	2015–2017

Locations

Location	Patents	Span
Seoul, KR	10	2013–2018
Yongin-si, KR	4	2010–2020
Suwon-si, KR	3	2008–2010
Cambridge, Massachusetts, US	2	2017–2019
Hwaseong-si, KR	2	2007–2011