Inventor
Shinsaku Sekido
Inventor
Kyoto, JP
Overview
Patents· 3 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices75%
G06FElectric digital data processing25%
PatentTitleYear
7,562,327'Mask layout design improvement in gate width direction'20097,093,215'Semiconductor circuit device and circuit simulation method for the same'20066,963,115'Semiconductor device comprising a discontinuous region and/or a continuous region having trench isolation stress applied thereto'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2006Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (2)· patent assignee history
2005–2006Based in Kyoto, JP· patent location history
2009Patents assigned to PANASONIC CORP (1)· patent assignee history
2009Based in Osaka, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MATSUSHITA ELECTRIC INDUSTRIAL CO LTD | 2 | 2005–2006 |
| PANASONIC CORP | 1 | 2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kyoto, JP | 2 | 2005–2006 |
| Osaka, JP | 1 | 2009 |