Inventor

Sheng-Hsiung Wang

Inventor

Zhubei City, TW

Overview

21→

Patents

2013–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices31%

H01LSemiconductor devices27%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%

G06FElectric digital data processing12%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%

Y02PClimate change mitigation technologies in the production or processing of goods3%

PatentTitleYear

10,854,512Method and IC design with non-linear power rails2020 10,685,880Methods for reducing contact depth variation in semiconductor fabrication2020 10,664,639Cell layout and structure2020 10,522,527System and method of processing cutting layout and example switching circuit2019 10,522,681Method of forming a FinFET having a relaxation prevention anchor2019 10,515,850Method and IC design with non-linear power rails2019 10,504,837Semiconductor device including a conductive feature over an active region2019 10,276,718FinFET having a relaxation prevention anchor2019 9,991,158Semiconductor device, layout of semiconductor device, and method of manufacturing semiconductor device2018 9,984,191Cell layout and structure2018 9,899,263'Method of forming layout design'2018 9,859,364'Semiconductor device and manufacturing method thereof'2018 9,806,071'Integrated circuit with elongated coupling'2017 9,431,381'System and method of processing cutting layout and example switching circuit'2016 9,425,141'Integrated circuit with elongated coupling'2016 9,412,700'Semiconductor device and method of manufacturing semiconductor device'2016 9,349,657'Fabrication methods of integrated semiconductor structure'2016 9,336,348'Method of forming layout design'2016 9,281,307'Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure'2016 8,431,453'Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure'2013 8,372,719'Hard mask removal for semiconductor devices'2013

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2013–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (5)· patent assignee history

2013–2016Patents assigned to WANG SHENG-HSIUNG (3)· patent assignee history

2013–2016Patents assigned to HSU FAN-YI (2)· patent assignee history

2013–2016Patents assigned to LIN CHIA-PIN (2)· patent assignee history

2013–2020Based in Zhubei City, TW· patent location history

2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (16)· patent assignee history

2018–2020Based in Hsinchu County, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	16	2016–2020
TAIWAN SEMICONDUCTOR MFG	5	2013–2016
WANG SHENG-HSIUNGself	3	2013–2016
HSU FAN-YI	2	2013–2016
LIN CHIA-PIN	2	2013–2016

Locations

Location	Patents	Span
Zhubei City, TW	15	2013–2020
Hsinchu County, TW	6	2018–2020