Inventor
Ju Hoon Yoon
Inventor
Seoul, KR
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1040%
H01LSemiconductor devices23%
G06VImage or video recognition or understanding9%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation9%
G06KGraphical data reading5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
A61BDiagnosis2%
F21VFunctional features or details of lighting devices or systems thereof2%
G06TImage data processing or generation, in general2%
H04NPictorial communication, e.g. television2%
PatentTitleYear
10,966,599Endoscopic stereo matching method and apparatus using direct attenuation model202110,692,918Electronic device package and fabricating method thereof202010,388,643Semiconductor device using EMC wafer support system and fabricating method thereof201910,304,890Electronic device package and fabricating method thereof201910,177,117Method for fabricating semiconductor package having a multi-layer molded conductive substrate and structure201910,090,230Semiconductor device with a semiconductor die embedded between an extended substrate and a bottom substrate201810,062,626Semiconductor device and manufacturing method thereof20189,831,282Electronic device package and fabricating method thereof20179,633,966'Stacked semiconductor package and manufacturing method thereof'20179,627,368'Semiconductor device using EMC wafer support system and fabricating method thereof'20179,627,348'Laser assisted bonding for semiconductor die interconnections'20179,431,447'Package of finger print sensor and fabricating method thereof'20169,129,873'Package of finger print sensor and fabricating method thereof'20158,847,372'Exposed die overmolded flip chip package and fabrication method'20148,541,260'Exposed die overmolded flip chip package and fabrication method'20138,476,748'Exposed die overmolded flip chip package and fabrication method'20138,368,194'Exposed die overmolded flip chip package'20138,207,022'Exposed die overmolded flip chip package method'20127,898,093'Exposed die overmolded flip chip package and fabrication method'20116,589,801'Wafer-scale production of chip-scale semiconductor packages using wafer mapping techniques'20036,479,887'Circuit pattern tape for wafer-scale production of chip size semiconductor packages'20026,428,641'Method for laminating circuit pattern tape on semiconductor wafer'20026,150,709'Grid array type lead frame having lead ends in different planes'20005,866,939'Lead end grid array semiconductor package'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2020Patents assigned to AMKOR TECHNOLOGY INC (23)· patent assignee history
1999–2000Patents assigned to ANAM SEMICONDUCTOR INC (2)· patent assignee history
1999–2014Based in Seoul, KR· patent location history
2012–2013Patents assigned to BARROW MICHAEL (2)· patent assignee history
2012–2013Patents assigned to DARVEAUX ROBERT FRANCIS (2)· patent assignee history
2012–2013Patents assigned to JIMAREZ MIGUEL ANGEL (2)· patent assignee history
2015–2019Based in Gyeonggi-do, KR· patent location history
2016–2020Based in Namyangju-si, KR· patent location history
2021Based in Sejong-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| AMKOR TECHNOLOGY INC | 23 | 1999–2020 |
| ANAM SEMICONDUCTOR INC | 2 | 1999–2000 |
| BARROW MICHAEL | 2 | 2012–2013 |
| DARVEAUX ROBERT FRANCIS | 2 | 2012–2013 |
| JIMAREZ MIGUEL ANGEL | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Seoul, KR | 11 | 1999–2014 |
| Namyangju-si, KR | 6 | 2016–2020 |
| Gyeonggi-do, KR | 6 | 2015–2019 |
| Sejong-si, KR | 1 | 2021 |