Inventor
STEPHEN J. POWELL
Inventor
US
Overview
Patents· 8 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing67%
G11CStatic stores25%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use8%
PatentTitleYear
12,554,402Decoding and executing memory command with partial frame data202611,687,254Host synchronized autonomous data chip address sequencer for a distributed buffer memory system202311,587,600Address/command chip controlled data chip address sequencing for a distributed memory buffer system202311,520,659Refresh-hiding memory system staggered refresh202211,379,123Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system202211,372,703Reduced system memory latency via a variable latency interface202211,269,561Speculative bank activate dynamic random access memory (DRAM) scheduler202211,157,411Information handling system with immediate scheduling of load operations2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to IBM (8)· patent assignee history
2021–2026Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 8 | 2021–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 8 | 2021–2026 |