Inventor
ZHONGZE WANG
Inventor
US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing25%
G06NComputing arrangements based on specific computational models25%
G11CStatic stores21%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use8%
H01LSemiconductor devices6%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
H10DInorganic electric semiconductor devices4%
G06GAnalogue computers2%
H03KPulse technique2%
H04NPictorial communication, e.g. television2%
PatentTitleYear
12,598,981Port landing-free low-skew signal distribution with backside metallization and buried rail202612,541,340Accumulator for digital computation-in-memory architectures202612,524,372Folding column adder architecture for digital compute in memory202612,513,915Dynamic random-access memory (DRAM) on hot compute logic for last-level-cache202512,340,304Partial sum management and reconfigurable systolic flow architectures for in-memory computation202512,074,109Trench power rail in cell circuits to reduce resistance and related power distribution networks and fabrication methods202412,019,905Digital compute in memory202411,790,241Systems and methods for modifying neural networks for binary processing applications202311,631,455Compute-in-memory bitcell with capacitively-coupled write operation202311,626,156Compute-in-memory (CIM) bit cell circuits each disposed in an orientation of a cim bit cell circuit layout including a read word line (RWL) circuit in a cim bit cell array circuit202311,581,037Digital compute-in-memory (DCIM) bit cell circuit layouts and DCIM arrays for multiple operations per column202311,562,212Performing XNOR equivalent operations by adjusting column thresholds of a compute-in-memory array202311,562,205Parallel processing of a convolutional layer of a neural network with compute-in-memory array202311,551,759Voltage offset for compute-in-memory architecture202311,500,960Memory cell for dot product operation in compute-in-memory chip202211,494,629Charge-sharing compute-in-memory system202211,487,507Multi-bit compute-in-memory (CIM) arrays employing bit cell circuits optimized for accuracy and power efficiency202211,474,786Fast digital multiply-accumulate (MAC) by fast digital multiplication circuit202211,340,867Compute-in-memory (CIM) binary multiplier2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2026Patents assigned to QUALCOMM INC (18)· patent assignee history
2022–2026Based in US· patent location history
2026Patents assigned to QUALCOMM INCORPORATED (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| QUALCOMM INC | 18 | 2022–2026 |
| QUALCOMM INCORPORATED | 1 | 2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 19 | 2022–2026 |