LexDanaLexDanabeta
Inventor

Chien-Chung Huang

Inventor
Taichung, TW

Overview

71→
Patents
1999–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 71 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1020%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%
H10DInorganic electric semiconductor devices15%
H01LSemiconductor devices13%
H05KPrinted circuits5%
H10NElectric solid-state devices not otherwise provided for3%
Y10TTechnical subjects covered by former us classification3%
C23CCoating metallic material2%
G05BControl or regulating systems in general2%
G06FElectric digital data processing2%
PatentTitleYear
10,868,239Gradient protection layer in MTJ manufacturing202010,862,023Semiconductor structure and manufacturing method of the same202010,770,345Integrated circuit and fabrication method thereof202010,651,373Memory device and fabrication method thereof202010,510,867FinFETs and methods of forming the same201910,157,997FinFETs and methods of forming the same201810,025,155Bottom electrode substrate for segment-type electro-phoretic display and method for manufacturing thereof20189,721,840'Method of forming complementary metal oxide semiconductor device with work function layer'20179,697,909'Shift register'20179,588,728'Mobile display system and mobile display device'20179,525,113'Method of manufacturing a LED package structure for preventing lateral light leakage'20169,502,305'Method for manufacturing CMOS transistor'20169,462,718'Circuit board mounting apparatus'20169,412,743'Complementary metal oxide semiconductor device'20169,401,417'Method of manufacturing a semiconductor device'20169,397,189'Semiconductor structure having a metal gate with side wall spacers'20169,366,421'LED base module and LED lighting device'20169,349,324'Pixel circuit and display device using the same'20169,349,822'Semiconductor device and method for fabricating the same'20169,326,394'Dual screen electronic device and detachable display module thereof'20169,236,541'LED package structures for preventing lateral light leakage and method of manufacturing the same'20169,076,759'Semiconductor device and manufacturing method of the same'20159,048,254'Semiconductor structure having a metal gate with side wall spacers'20159,048,367'Multichip package structure for generating a symmetrical and uniform light-blending source'20158,969,209'Method for removing oxide'20158,881,246'System and method for providing secured integrated engineering analysis'20148,855,110'Personal video recorder having improved data access and method thereof'20148,719,109'Facilitating transactions involving items by notifying selected users of demand for items'20148,642,477'Method for clearing native oxide'20148,587,128'Damascene structure'20138,536,060'Method for clearing native oxide'20138,507,350'Fabricating method of semiconductor elements'20138,440,580'Method of fabricating silicon nitride gap-filling layer'20138,350,246'Structure of porous low-k layer and interconnect structure'20138,344,465'Semiconductor device'20138,163,607'Semiconductor device and method of making the same'20128,092,861'Method of fabricating an ultra dielectric constant (K) dielectric layer'20128,067,281'Method of fabricating complementary metal-oxide-semiconductor (CMOS) Device'20117,983,051'DRAM module with solid state disk'20117,947,565'Forming method of porous low-k layer and interconnect process'20117,858,421'Method of forming metal-oxide-semiconductor transistor'20107,777,284'Metal-oxide-semiconductor transistor and method of forming the same'20107,752,479'CPU frequency regulating circuit'20107,662,730'Method for fabricating ultra-high tensile-stressed film and strained-silicon transistors thereof'20107,655,987'Method for fabricating ultra-high tensile-stressed film and strained-silicon transistors thereof'20107,645,712'Method of forming contact'20107,645,698'Method for forming barrier layer'20107,647,132'Method and system for problem case packaging'20107,642,166'Method of forming metal-oxide-semiconductor transistors'20107,566,668'Method of forming contact'20097,496,464'Validation system with flow control capability'20097,494,878'Metal-oxide-semiconductor transistor and method of forming the same'20097,485,515'Method of manufacturing metal oxide semiconductor'20097,397,124'Process of metal interconnects'20087,332,447'Method of forming a contact'20087,294,572'Method of forming contact'20077,199,040'Barrier layer structure'20077,145,275'Bearing with auxiliary magnetism'20067,133,735'Experiment management system and method thereof in semiconductor manufacturing environment'20066,877,994'Electronic device having a USB connector'20056,849,541'Method of fabricating a dual damascene copper wire'20056,833,875'Multi-standard video decoder'20046,775,584'Operation-supervision integrated interface'20046,284,645'Controlling improvement of critical dimension of dual damasceue process using spin-on-glass process'20016,255,162'Method of gap filling'20016,248,662'Method of improving gap filling characteristics of dielectric layer by implantation'20016,239,024'Method of filling gap with dielectrics'20016,204,096'Method for reducing critical dimension of dual damascene process using spin-on-glass process'20016,119,736'Vehicle for transporting wet objects'20006,077,789'Method for forming a passivation layer with planarization'20005,974,627'Handle for standard mechanical interface (SMIF) pod'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2014Patents assigned to TAIWAN SEMICONDUCTOR MFG (6)· patent assignee history
1999–2020Based in Taichung, TW· patent location history
2000–2017Patents assigned to UNITED MICROELECTRONICS CORP (41)· patent assignee history
2004–2014Based in San Jose, CA, US· patent location history
2007–2018Based in Hsinchu, TW· patent location history
2011–2015Patents assigned to HUANG CHIEN-CHUNG (14)· patent assignee history
2011–2015Patents assigned to HO NIEN-TING (5)· patent assignee history
2015–2016Based in Taoyuan County, TW· patent location history
2016–2017Based in Tainan, TW· patent location history
2018–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (6)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
UNITED MICROELECTRONICS CORP412000–2017
HUANG CHIEN-CHUNGself142011–2015
TAIWAN SEMICONDUCTOR MFG61999–2014
TAIWAN SEMICONDUCTOR MFG CO LTD62018–2020
HO NIEN-TING52011–2015
Locations
LocationPatentsSpan
Taichung, TW461999–2020
Hsinchu, TW82007–2018
Taoyuan County, TW42015–2016
Tainan, TW32016–2017
San Jose, California, US32004–2014