Inventor

John S. Howard

Inventor
Portland, OR, US

Overview

36→
Patents
2000–2020
Patent span
Physics
Primary field (CPC G)

Patents· 36 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing51%
H04LTransmission of digital information, e.g. telegraphic communication17%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use16%
H04NPictorial communication, e.g. television6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
B42DBooks2%
G09GArrangements or circuits for control of indicating devices using static means to present variable information2%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications2%
PatentTitleYear
10,635,393Buffer-related USB communication202010,592,205Scalable input/output system and techniques to transmit data between domains without a central processor202010,372,491Execution context migration method and apparatus201910,366,017Methods and apparatus to offload media streams in host devices201910,127,012Scalable input/output system and techniques to transmit data between domains without a central processor20189,892,081'Split transaction protocol for a bus system'20189,600,436'Split transaction protocol for a bus system'20179,558,142'Split transaction protocol for a bus system'20179,407,863'System and method for processing visual information'20168,949,636'Power efficient flow control model for USB asynchronous transfers'20158,677,032'Split transaction protocol for a bus system'20148,312,183'Bus port power management'20127,886,087'Split transaction protocol for a bus system'20117,702,825'Enhancements to universal serial bus (USB) suspend and resume operations'20107,675,871'Split transaction protocol for a bus system'20107,512,082'Tracking transaction status for a bus system providing legacy bus compatibility'20097,490,255'Power efficient flow control model for USB asynchronous transfers'20097,340,550'USB schedule prefetcher for low power'20087,228,366'Method and apparatus for deterministic removal and reclamation of work items from an expansion bus schedule'20077,213,096'Operating a remote USB host controller'20077,028,124'Method and apparatus for dual queue head processing of interrupt endpoints'20067,007,110'Nak throttling for USB host controllers'20067,007,119'System and method for supporting split transactions on a bus'20066,952,429'Transaction scheduling for a bus system in a multiple speed environment'20056,813,251'Split Transaction protocol for a bus system'20046,792,495'Transaction scheduling for a bus system'20046,771,664'Transaction scheduling for a bus system in a multiple speed environment'20046,748,465'Local bus polling support buffer'20046,684,272'Throughput enhancement for a universal host controller interface in a universal serial bus'20046,678,761'Method and apparatus for budget development under universal serial bus protocol in a multiple speed transmission environment'20046,629,186'Bus controller and associated device drivers for use to control a peripheral bus having at least one store-and-forward segment'20036,606,674'Method and apparatus for reducing circular list\'s thrashing by detecting the queues\' status on a circular linked list'20036,546,018'Digital system having a peripheral bus structure with at least one store-and-forward segment'20036,389,501'I/O peripheral device for use in a store-and-forward segment of a peripheral bus'20026,217,076'Maintenance scheduling and tracking system'20016,067,591'Method and apparatus for avoidance of invalid transactions in a bus host controller'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2020Patents assigned to INTEL CORP (35)· patent assignee history
2000–2019Based in Portland, OR, US· patent location history
2001Based in Apache Junction, AZ, US· patent location history
2012–2020Patents assigned to HOWARD JOHN S (3)· patent assignee history
2014Patents assigned to GARNEY JOHN I (1)· patent assignee history
2015Patents assigned to DIEFENBAUGH PAUL (1)· patent assignee history
2015Patents assigned to HOWARD JOHN (1)· patent assignee history
2016–2020Based in Hillsboro, OR, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP352000–2020
HOWARD JOHN Sself32012–2020
DIEFENBAUGH PAUL12015
GARNEY JOHN I12014
HOWARD JOHNself12015
Locations
LocationPatentsSpan
Portland, OR, US302000–2019
Hillsboro, OR, US52016–2020
Apache Junction, AZ, US12001