Inventor
Rajen S. Sidhu
Inventor
Chandler, AZ, US
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1033%
H01LSemiconductor devices28%
B23KSoldering or unsoldering10%
H05KPrinted circuits10%
Y10TTechnical subjects covered by former us classification8%
C23CCoating metallic material3%
C25DProcesses for the electrolytic or electrophoretic production of coatings3%
F28DHeat-exchange apparatus, not provided for in another subclass, in which the heat-exchange media do not come into direct contact3%
F28FDetails of heat-exchange and heat-transfer apparatus, of general application3%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
PatentTitleYear
10,651,108Foam composite202010,049,971Package structure to enhance yield of TMI interconnections20189,950,393Hybrid low metal loading flux20189,613,933'Package structure to enhance yield of TMI interconnections'20179,461,014'Methods of forming ultra thin package structures including low temperature solder and structures formed therby'20169,394,619'Methods of adding dopants to conductive interconnect structures in substrate technologies and structures formed thereby'20169,283,641'Flux materials for heated solder placement and associated techniques and configurations'20169,257,405'Multi-solder techniques and configurations for integrated circuit package assembly'20169,064,971'Methods of forming ultra thin package structures including low temperature solder and structures formed therby'20159,024,453'Functional material systems and processes for package-level interconnects'20158,920,934'Hybrid solder and filled paste in microelectronic packaging'20148,896,110'Paste thermal interface materials'20148,895,365'Techniques and configurations for surface treatment of an integrated circuit substrate'20148,809,181'Multi-solder techniques and configurations for integrated circuit package assembly'20148,701,281'Substrate metallization and ball attach metallurgy with a novel dopant element'2014Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2014–2020Patents assigned to INTEL CORP (15)· patent assignee history
2014–2018Patents assigned to SIDHU RAJEN S (6)· patent assignee history
2014–2017Patents assigned to DANI ASHAY A (3)· patent assignee history
2014–2018Patents assigned to DUDEK MARTHA A (3)· patent assignee history
2014–2018Based in Chandler, AZ, US· patent location history
2017–2018Patents assigned to MATAYABAS JR JAMES C (2)· patent assignee history
2020Based in Portland, OR, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 15 | 2014–2020 |
| SIDHU RAJEN Sself | 6 | 2014–2018 |
| DANI ASHAY A | 3 | 2014–2017 |
| DUDEK MARTHA A | 3 | 2014–2018 |
| MATAYABAS JR JAMES C | 2 | 2017–2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chandler, AZ, US | 14 | 2014–2018 |
| Portland, OR, US | 1 | 2020 |