Inventor
Jin Yong Seong
Inventor
Seoul, KR
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores54%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
H10BElectronic memory devices9%
G06FElectric digital data processing7%
H01LSemiconductor devices5%
H10DInorganic electric semiconductor devices5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
G01RMeasuring electric variables2%
G05FSystems for regulating electric or magnetic variables2%
LOC132%
PatentTitleYear
11,086,566Storage device and operating method thereof2021D0920903Front cover for battery module202110,529,397Memory chip, package device having the memory chips, and operating method of package device202010,354,702Semiconductor memory device with a control logic capable of controlling the ready busy output control unit to adjust an output current to be outputted to a ready/busy pad, and a method for operating the same201910,283,203Semiconductor memory device and method of operating the same201910,054,632Semiconductor apparatus and characteristic measurement circuit therefor201810,002,652Memory system and method for operating the same20189,305,615'Semiconductor device'20169,230,650'Semiconductor device and method for operating the same'20169,190,366'Multi-chip package'2015RE045051'Page buffer circuit of memory device and program method'20148,498,153'Semiconductor memory device and method of operating the same'20138,350,374'Multi-chip package including chip address circuit'20138,279,651'Memory chip package with efficient data I/O control'20128,125,828'Page buffer circuit with reduced size and methods for reading and programming data with the same'20128,120,977'Test method for nonvolatile memory device'20128,036,030'Multi-level cell copyback program method in a non-volatile memory device'20117,924,611'Page buffer circuit with reduced size and methods for reading and programming data with the same'20117,881,127'Nonvolatile memory device and method of testing the same'20117,852,684'Page buffer circuit of memory device and program method'20107,848,141'Multi-level cell copyback program method in a non-volatile memory device'20107,848,157'Page buffer circuit of memory device and program method'20107,668,023'Page buffer circuit of memory device and program method'20107,660,185'Chip select controller and non-volatile memory device including the same'20107,535,768'Method of controlling copy-back operation of flash memory device including multi-level cells'20097,515,484'Page buffer circuit of memory device and program method'20097,508,709'Page buffer circuit with reduced size and methods for reading and programming data with the same'20097,333,365'Page buffer of flash memory device with improved program operation performance and program operation control method'20087,301,825'Method of controlling copy-back operation of flash memory device including multi-level cells'20077,200,044'Page buffer circuit with reduced size, and flash memory device having page buffer and program operation method thereof'20076,927,437'Ferroelectric memory device'20056,919,212'Method for fabricating ferroelectric random access memory device with merged-top electrode-plateline capacitor'20056,849,468'Method for manufacturing ferroelectric random access memory capacitor'20056,818,935'Semiconductor device and method for fabricating the same'20046,773,929'Ferroelectric memory device and method for manufacturing the same'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2013Patents assigned to HYNIX SEMICONDUCTOR INC (23)· patent assignee history
2004–2005Based in Ichon-shi, KR· patent location history
2007–2021Based in Seoul, KR· patent location history
2012–2021Patents assigned to SK HYNIX INC (11)· patent assignee history
2012–2013Patents assigned to SEONG JIN YONG (5)· patent assignee history
2012Patents assigned to LEE WAN SEOB (1)· patent assignee history
2018Based in Icheon-si, KR· patent location history
2021Patents assigned to LG CHEMICAL LTD (1)· patent assignee history
2021Based in Daejeon, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HYNIX SEMICONDUCTOR INC | 23 | 2004–2013 |
| SK HYNIX INC | 11 | 2012–2021 |
| SEONG JIN YONGself | 5 | 2012–2013 |
| LEE WAN SEOB | 1 | 2012 |
| LG CHEMICAL LTD | 1 | 2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Seoul, KR | 28 | 2007–2021 |
| Ichon-shi, KR | 5 | 2004–2005 |
| Daejeon, KR | 1 | 2021 |
| Icheon-si, KR | 1 | 2018 |