Inventor

Liming Tsau

Inventor
Irvine, CA, US

Overview

17→
Patents
2002–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 17 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1034%
G11CStatic stores11%
H01LSemiconductor devices11%
H10DInorganic electric semiconductor devices11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
H10BElectronic memory devices8%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
G01RMeasuring electric variables5%
Y10TTechnical subjects covered by former us classification3%
PatentTitleYear
11,049,829Redistribution metal and under bump metal interconnect structures and method202110,629,504Die edge crack and delamination detection202010,504,862Redistribution metal and under bump metal interconnect structures and method20199,741,667'Integrated circuit with die edge assurance structure'20178,106,476'Semiconductor die with fuse window and a monitoring window over a structure which indicates fuse integrity'20127,329,955'Metal-insulator-metal (MIM) capacitor'20087,187,015'High-density metal capacitor using dual-damascene copper interconnect'20077,049,204'High density metal capacitor using via etch stopping layer as field dielectric in dual-damascence interconnect process'20067,009,891'System and method for one-time programmed memory through direct-tunneling oxide breakdown'20066,985,387'System and method for one-time programmed memory through direct-tunneling oxide breakdown'20066,960,819'System and method for one-time programmed memory through direct-tunneling oxide breakdown'20056,952,053'Metal bond pad for integrated circuits allowing improved probing ability of small pads'20056,950,355'System and method to screen defect related reliability failures in CMOS SRAMS'20056,902,972'High-density metal capacitor using dual-damascene copper interconnect'20056,833,604'High density metal capacitor using dual-damascene copper interconnect'20046,803,306'High density metal capacitor using via etch stopping layer as field dielectric in dual-damascence interconnect process'20046,417,094'Dual-damascene interconnect structures and methods of fabricating same'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002Patents assigned to NEWPORT FAB LLC (1)· patent assignee history
2002–2021Based in Irvine, CA, US· patent location history
2004–2012Patents assigned to BROADCOM CORP (12)· patent assignee history
2012Patents assigned to LUTZE ROBERT (1)· patent assignee history
2017Patents assigned to AVAGO TECHNOLOGIES GENERAL IP (1)· patent assignee history
2019–2021Patents assigned to AVAGO TECH INT SALES PTE LID (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
BROADCOM CORP122004–2012
AVAGO TECH INT SALES PTE LID32019–2021
AVAGO TECHNOLOGIES GENERAL IP12017
LUTZE ROBERT12012
NEWPORT FAB LLC12002
Locations
LocationPatentsSpan
Irvine, California, US172002–2021