Inventor
Sireesha GOGINENI
Inventor
US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices42%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1042%
H05KPrinted circuits17%
PatentTitleYear
12,046,581Integrated circuit package with glass spacer202411,881,441Stacked die semiconductor package spacer die202411,848,292Pad design for thermal fatigue resistance and interconnect joint reliability202311,694,976Bowl shaped pad202311,393,788Integrated circuit package with glass spacer2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2024Patents assigned to INTEL CORP (5)· patent assignee history
2022–2024Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 5 | 2022–2024 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 5 | 2022–2024 |