Inventor
Cary L. Delano
Inventor
Los Altos, CA, US
Overview
Patents· 45 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Fprimary
H03FAmplifiers46%
H03HImpedance networks, e.g. resonant circuits9%
H03MCoding9%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems6%
H03KPulse technique6%
H03CModulation3%
H03GControl of amplification3%
H04RLoudspeakers, microphones, gramophone pick-ups or like acoustic electromechanical transducers3%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications3%
G05FSystems for regulating electric or magnetic variables1%
PatentTitleYear
11,081,635Method and apparatus for driving a piezoelectric transducer with stored charge recovery202110,797,660Multiphase buck-boost amplifier2020RE047383Resource pooling amplifier20199,300,261'Method and apparatus for efficient load biasing'20168,773,196'Resource pooling amplifier'20148,750,531'Active noise cancellation'20148,400,122'Selectively activated three-state charge pump'20138,179,372'Electronic display with array context-sensitive search (ACS) technology'20128,134,403'Reduced current charge pump'20128,081,785'High efficiency converter providing switching amplifier bias'20117,750,732'Adaptive rail amplifier (ARA) technology'20107,733,178'High efficiency audio amplifier'20107,649,415'Class L amplifier'20107,548,178'Method and apparatus for ADC size and performance optimization'20097,522,433'Efficient voltage rail generation'20097,498,880'Class L amplifier'20096,798,288'Receive band rejection for a digital RF amplifier'20046,693,491'Method and apparatus for controlling an audio signal level'20046,603,355'Active common mode feedback for unbalanced input and feedback signals and methods thereof'20036,580,322'Dynamic switching frequency control for a digital switching amplifier'20036,577,189'Scheme for reducing transmit-band noise floor and adjacent channel power with power backoff'20036,577,194'Resonant gate drive technique for a digital power amplifier'20036,549,069'Self-timed switching for a digital power amplifier'20036,518,849'Dynamic delay compensation versus average switching frequency in a modulator loop and methods thereof'20036,515,604'Mixed signal processing unit with improved distortion and noise characteristics'20036,414,560'Loop delay compensation for a digital power amplifier'20026,411,165'Active common mode feedback for unbalanced input and feedback signals and methods thereof'20026,362,683'Break-before-make distortion compensation for a digital amplifier'20026,351,184'Dynamic switching frequency control for a digital switching amplifier'20026,348,836'Dual independently clocked analog-to-digital conversion for a digital power amplifier'20026,316,992'DC offset calibration for a digital switching amplifier'20016,297,697'Methods and apparatus for noise shaping a mixed signal power output'20016,281,747'Power efficient line driver'20016,246,283'Power efficient line driver'20016,229,390'Methods and apparatus for noise shaping a mixed signal power output'20016,127,893'Method and apparatus for controlling an audio signal level'20006,107,844'Methods and apparatus for reducing MOSFET body diode conduction in a half-bridge configuration'20005,974,089'Method and apparatus for performance improvement by qualifying pulses in an oversampled noise-shaping signal processor'19995,909,153'Method and apparatus for compensating for delays in modulator loops'19995,808,491'Method and apparatus for sensing a common mode voltage'19985,777,512'Method and apparatus for oversampled, noise-shaping, mixed-signal processing'19985,754,079'Method and apparatus for biasing a differential cascode circuit'19985,444,414'Low voltage filter transconductance cell'19955,438,288'High differential output impedance setter'19955,392,002'Low voltage bipolar negative impedance converter'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995Patents assigned to NAT SEMICONDUCTOR CORP (3)· patent assignee history
1995–2003Based in San Jose, CA, US· patent location history
1998–2004Patents assigned to TRIPATH TECHNOLOGY INC (25)· patent assignee history
2002–2021Based in Los Altos, CA, US· patent location history
2009–2014Patents assigned to FAIRCHILD SEMICONDUCTOR (8)· patent assignee history
2011–2016Patents assigned to DELANO CARY L (7)· patent assignee history
2019–2021Patents assigned to MAXIM INTEGRATED PRODUCTS (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TRIPATH TECHNOLOGY INC | 25 | 1998–2004 |
| FAIRCHILD SEMICONDUCTOR | 8 | 2009–2014 |
| DELANO CARY Lself | 7 | 2011–2016 |
| MAXIM INTEGRATED PRODUCTS | 3 | 2019–2021 |
| NAT SEMICONDUCTOR CORP | 3 | 1995 |
Locations
| Location | Patents | Span |
|---|---|---|
| Los Altos, California, US | 27 | 2002–2021 |
| San Jose, California, US | 18 | 1995–2003 |