Inventor
Katsunori Yahashi
Inventor
Kanagawa, JP
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices35%
H10BElectronic memory devices27%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
H01LSemiconductor devices4%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation4%
H10NElectric solid-state devices not otherwise provided for4%
H01SDevices using the process of light amplification by stimulated emission of radiation [laser] to amplify or generate light2%
H10HInorganic light-emitting semiconductor devices having potential barriers2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
9,887,098'Method for manufacturing integrated circuit device'20189,570,461'Method for manufacturing semiconductor memory device'20178,649,217'Non-volatile memory device and manufacturing method of the same'20148,648,404'Nonvolatile semiconductor memory device, three-dimensional semiconductor device, and method of manufacturing the same'20148,492,824'Semiconductor memory device and method for manufacturing same'20138,487,365'Semiconductor device and method for manufacturing same'20138,460,997'Semiconductor memory device and method of manufacturing the same'20138,313,998'Method for manufacturing semiconductor device'20128,294,199'Nonvolatile semiconductor memory device and method for manufacturing the same'20128,273,628'Semiconductor device manufacturing method including exposing electrode layers into a hole'20128,216,942'Method for manufacturing semiconductor device'20128,211,783'Method for manufacturing semiconductor device including a patterned SiOC film as a mask'20128,178,913'Semiconductor device and method for manufacturing same'20128,088,689'Method of fabricating semiconductor device'20128,072,024'Nonvolatile semiconductor memory device and method for manufacturing same'20118,062,938'Semiconductor device and method of fabricating the same'20118,062,940'Method of manufacturing semiconductor memory device, and semiconductor memory device'20117,939,891'Semiconductor device having MISFETs and manufacturing method thereof'20117,928,483'Semiconductor device and method for manufacturing same'20117,683,436'Semiconductor device having a pole-shaped portion and method of fabricating the same'20107,387,921'Method of manufacturing semiconductor device'20086,225,650'GAN group crystal base member having low dislocation density, use thereof and manufacturing methods thereof'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2013Based in Yokohama, JP· patent location history
2008–2017Patents assigned to TOSHIBA KK (20)· patent assignee history
2010–2012Based in Kanagawa, JP· patent location history
2011–2014Patents assigned to YAHASHI KATSUNORI (15)· patent assignee history
2011–2014Patents assigned to KO NIKKA (2)· patent assignee history
2012–2013Patents assigned to OHIWA TOKUHISA (2)· patent assignee history
2012–2013Patents assigned to SAKURAI NORIKO (2)· patent assignee history
2012–2014Based in Mie, JP· patent location history
2014–2018Based in Yokkaichi, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOSHIBA KK | 20 | 2008–2017 |
| YAHASHI KATSUNORIself | 15 | 2011–2014 |
| KO NIKKA | 2 | 2011–2014 |
| OHIWA TOKUHISA | 2 | 2012–2013 |
| SAKURAI NORIKO | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kanagawa, JP | 7 | 2010–2012 |
| Mie, JP | 6 | 2012–2014 |
| Yokohama, JP | 6 | 2001–2013 |
| Yokkaichi, JP | 3 | 2014–2018 |