Inventor
Jürgen Lindolf
Inventor
Friedberg, DE
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores36%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H10DInorganic electric semiconductor devices18%
G01RMeasuring electric variables11%
G05FSystems for regulating electric or magnetic variables4%
H10BElectronic memory devices4%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
PatentTitleYear
7,317,603'Integrated circuit with electrostatic discharge protection'20087,126,204'Integrated semiconductor circuit with an electrically programmable switching element'20066,919,234'Method for producing an antifuse in a substrate and an antifuse structure for integration in a substrate'20056,917,208'Method and test structure for determining resistances at a plurality of interconnected resistors in an integrated circuit'20056,838,724'Transistor array and semiconductor memory configuration fabricated with the transistor array'20056,788,129'Integrated circuit having a programmable element and method of operating the circuit'20046,768,139'Transistor configuration for a bandgap circuit'20046,756,655'Fuse for a semiconductor configuration and method for its production'20046,721,215'Integrated dynamic memory and method for operating it'20046,717,200'Vertical field effect transistor with internal annular gate and method of production'20046,600,680'Circuit configuration and method for determining a time constant of a storage capacitor of a memory cell in a semiconductor memory'20036,552,549'Method of reading electrical fuses/antifuses'20036,501,283'Circuit configuration for measuring the capacitance of structures in an integrated circuit'20026,458,631'Method for fabricating an integrated circuit, in particular an antifuse'20026,456,553'Circuit configuration for switching over a receiver circuit in particular in DRAM memories and DRAM memory having the circuit configuration'20026,449,206'Semiconductor circuit configuration'20026,445,630'Method for carrying out a burn-in process for electrically stressing a semiconductor memory'20026,429,503'Connection element in an integrated circuit having a layer structure disposed between two conductive structures'20026,417,722'Sense amplifier configuration having a field-effect transistor having a short channel length and an adjustable threshold voltage'20026,181,624'Integrated circuit memory having a sense amplifier activated based on word line potentials'20016,125,073'Integrated semiconductor memory'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2004Patents assigned to SIEMENS AG (3)· patent assignee history
2000–2008Based in Friedberg, DE· patent location history
2002–2008Patents assigned to INFINEON TECHNOLOGIES AG (18)· patent assignee history
2005Based in Friedburg, DE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 18 | 2002–2008 |
| SIEMENS AG | 3 | 2000–2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| Friedberg, DE | 20 | 2000–2008 |
| Friedburg, DE | 1 | 2005 |