Inventor
Jeremy A. Wahl
Inventor
Delmar, NY, US
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices34%
H01LSemiconductor devices30%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
B82YSpecific uses or applications of nanostructures4%
PatentTitleYear
10,707,119Interconnect structures with airgaps and dielectric-capped interconnects202010,395,981Semiconductor device including a leveling dielectric fill material201910,049,944Method of manufacturing selective nanostructures into finFET process flow20189,875,936Spacer defined fin growth and differential fin width20189,660,075'Integrated circuits with dual silicide contacts and methods for fabricating same'20179,634,143'Methods of forming FinFET devices with substantially undoped channel regions'20179,570,344'Method to protect MOL metallization from hardmask strip process'20179,508,712'Semiconductor device with a multiple nanowire channel structure and methods of variably connecting such nanowires for current density modulation'20169,293,462'Integrated circuits with dual silicide contacts and methods for fabricating same'20169,196,694'Integrated circuits with dual silicide contacts and methods for fabricating same'20159,177,805'Integrated circuits with metal-insulator-semiconductor (MIS) contact structures and methods for fabricating same'20158,969,207'Methods of forming a masking layer for patterning underlying structures'20158,963,255'Strained silicon carbide channel for electron mobility of NMOS'20158,906,802'Methods of forming trench/via features in an underlying structure using a process that includes a masking layer formed by a directed self-assembly process'20148,853,019'Methods of forming a semiconductor device with a nanowire channel structure by performing an anneal process'20148,846,511'Methods of trimming nanowire structures'20148,759,904'Electronic device having plural FIN-FETs with different FIN heights and planar FETs on the same substrate'20148,722,482'Strained silicon carbide channel for electron mobility of NMOS'20148,691,640'Methods of forming dielectrically isolated fins for a FinFET semiconductor by performing an etching process wherein the etch rate is modified via inclusion of a dopant material'20148,481,410'Methods of epitaxial FinFET'20138,476,137'Methods of FinFET height control'20138,460,984'FIN-FET device and method and integrated circuits using such'20137,998,846'3-D integrated circuit system and method'2011Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2011Based in Sunnyvale, CA, US· patent location history
2013–2020Patents assigned to GLOBALFOUNDRIES INC (22)· patent assignee history
2013–2014Patents assigned to MAITRA KINGSUK (3)· patent assignee history
2013Patents assigned to WAHL JEREMY (3)· patent assignee history
2013Patents assigned to LICAUSI NICHOLAS (2)· patent assignee history
2013–2019Based in Delmar, NY, US· patent location history
2014Patents assigned to WAHL JEREMY A (2)· patent assignee history
2017Based in Malta, NY, US· patent location history
2020Based in Portland, OR, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 22 | 2013–2020 |
| MAITRA KINGSUK | 3 | 2013–2014 |
| WAHL JEREMYself | 3 | 2013 |
| LICAUSI NICHOLAS | 2 | 2013 |
| WAHL JEREMY Aself | 2 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Delmar, New York, US | 20 | 2013–2019 |
| Portland, OR, US | 1 | 2020 |
| Malta, New York, US | 1 | 2017 |
| Sunnyvale, California, US | 1 | 2011 |