Inventor
Rajiv Roy
Inventor
Bangalore, IN
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores33%
G01NInvestigating or analysing materials by determining their chemical or physical properties15%
G06TImage data processing or generation, in general12%
H05KPrinted circuits9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
Y10TTechnical subjects covered by former us classification6%
G01BMeasuring length, thickness or similar linear dimensions3%
G01RMeasuring electric variables3%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices3%
G06FElectric digital data processing3%
PatentTitleYear
10,430,215Method and system to transfer data between hardware emulator and host workstation20199,952,041Assessing alignment of top and bottom ends of TSVs and characterizing microfabrication process20189,767,870'Voltage aware circuitry'20179,583,209'High density memory architecture'20179,177,635'Dual rail single-ended read data paths for static random access memories'20159,177,633'Bit line write assist for static random access memory architectures'20159,147,495'Two-bit read-only memory cell'20159,111,637'Differential latch word line assist for SRAM'20159,064,583'Fast access with low leakage and low power technique for read only memory devices'20159,053,761'Circuit and method for improving sense amplifier reaction time in memory read operations'20158,988,959'Circuit and method for dynamically changing a trip point in a sensing inverter'20158,923,090'Address decoding circuits for reducing address and memory enable setup time'20148,264,899'Assistance in reset of data storage array'20126,765,666'System and method for inspecting bumped wafers'20046,252,981'System and method for selection of a reference die'20016,118,540'Method and apparatus for inspecting a workpiece'20005,987,161'Apparatus and method for identifying defective objects'19995,956,134'Inspection system and method for leads of semiconductor devices'19995,777,886'Programmable lead conditioner'19985,745,593'Method and system for inspecting integrated circuit lead burrs'19985,402,505'Semiconductor device lead inspection system'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995–1999Patents assigned to TEXAS INSTRUMENTS INC (2)· patent assignee history
1998–2004Patents assigned to SEMICONDUCTOR TECH & INSTR INC (6)· patent assignee history
1998–2004Based in Plano, TX, US· patent location history
2012–2015Based in Uttar Pradesh, IN· patent location history
2014–2015Patents assigned to LSI CORP (8)· patent assignee history
2014–2017Based in Bangalore, IN· patent location history
2015Patents assigned to AVAGO TECHNOLOGIES GENERAL IP (6)· patent assignee history
2017Patents assigned to ADVANCED RISC MACH LTD (2)· patent assignee history
2018Based in Dallas, TX, US· patent location history
2019Based in Fremont, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LSI CORP | 8 | 2014–2015 |
| AVAGO TECHNOLOGIES GENERAL IP | 6 | 2015 |
| SEMICONDUCTOR TECH & INSTR INC | 6 | 1998–2004 |
| ADVANCED RISC MACH LTD | 2 | 2017 |
| TEXAS INSTRUMENTS INC | 2 | 1995–1999 |
Locations
| Location | Patents | Span |
|---|---|---|
| Bangalore, IN | 8 | 2014–2017 |
| Plano, Texas, US | 7 | 1998–2004 |
| Uttar Pradesh, IN | 3 | 2012–2015 |
| Fremont, California, US | 1 | 2019 |
| Dallas, Texas, US | 1 | 2018 |