Inventor

Simon Ruffell

Inventor
South Hamilton, MA, US

Overview

23→
Patents
2014–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 23 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices23%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%
H10DInorganic electric semiconductor devices14%
H01JElectric discharge tubes or discharge lamps12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices7%
C23CCoating metallic material5%
H10BElectronic memory devices4%
G11CStatic stores2%
H10NElectric solid-state devices not otherwise provided for2%
PatentTitleYear
11,127,593Techniques and apparatus for elongation patterning using angled ion beams202111,043,380Techniques to engineer nanoscale patterned features using ions202110,971,368Techniques for processing substrates using directional reactive ion etching202110,665,421In-situ beam profile metrology202010,546,730Filling a cavity in a substrate using sputtering and deposition202010,381,232Techniques for manipulating patterned features using ions201910,280,512Apparatus and method for carbon film deposition profile control201910,229,832Techniques for forming patterned features using directional ions201910,222,202Three dimensional structure fabrication control using novel processing system201910,204,909Non-uniform gate oxide thickness for DRAM device201910,109,494FinFet spacer etch with no fin recess and no gate-spacer pull-down201810,008,384Techniques to engineer nanoscale patterned features using ions20189,984,889Techniques for manipulating patterned features using ions20189,934,981Techniques for processing substrates using directional reactive ion etching20189,929,015'High efficiency apparatus and method for depositing a layer on a three dimensional structure'20189,847,228Method for selectively depositing a layer on a three dimensional structure20179,589,811'FinFET spacer etch with no fin recess and no gate-spacer pull-down'20179,453,279'Method for selectively depositing a layer on a three dimensional structure'20169,287,123'Techniques for forming angled structures for reduced defects in heteroepitaxy of semiconductor films'20169,082,949'Magnetic memory and method of fabrication'20159,023,722'Compound semiconductor growth using ion implantation'20158,946,836'Magnetic memory and method of fabrication'20158,846,508'Method of implanting high aspect ratio features'2014

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2014–2016Patents assigned to VARIAN SEMICONDUCTOR EQUIPMENT (5)· patent assignee history
2014–2020Based in Hamilton, MA, US· patent location history
2015Patents assigned to EVANS MORGAN D (1)· patent assignee history
2015Patents assigned to RUFFELL SIMON (1)· patent assignee history
2015Based in Beverly, MA, US· patent location history
2016–2021Patents assigned to VARIAN SEMICONDUCTOR EQUIPMENT ASS INC (17)· patent assignee history
2016–2021Based in South Hamilton, MA, US· patent location history
2020Patents assigned to APPLIED MATERIALS INC (1)· patent assignee history
2020Based in East Hampton, MA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
VARIAN SEMICONDUCTOR EQUIPMENT ASS INC172016–2021
VARIAN SEMICONDUCTOR EQUIPMENT52014–2016
APPLIED MATERIALS INC12020
EVANS MORGAN D12015
RUFFELL SIMONself12015
Locations
LocationPatentsSpan
South Hamilton, Massachusetts, US172016–2021
Beverly, Massachusetts, US32015
Hamilton, Massachusetts, US22014–2020
East Hampton, Massachusetts, US12020