Inventor

Ashwin Narasimha

Inventor
Los Altos, CA, US

Overview

34→
Patents
2013–2021
Patent span
Physics
Primary field (CPC G)

Patents· 34 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing48%
G11CStatic stores21%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use13%
H03MCoding8%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications5%
H04LTransmission of digital information, e.g. telegraphic communication3%
G06VImage or video recognition or understanding2%
PatentTitleYear
11,132,255Methods and systems for implementing redundancy in memory controllers202110,809,928Efficient data deduplication leveraging sequential chunks or auxiliary databases202010,691,531Systems and methods for multi-zone data tiering for endurance extension in solid state drives202010,628,260Methods and systems for implementing redundancy in memory controllers202010,565,057Indirection-based storage system backups using markers including sets of serial numbers associated with segments202010,552,284System and method for controlling PCIe direct attached nonvolatile memory storage subsystems202010,475,517Characterizing and operating a non-volatile memory device201910,275,376Efficient cross device redundancy implementation on high performance direct attached non-volatile storage with data reduction201910,152,389Apparatus and method for inline compression and deduplication201810,133,629Methods and systems for implementing redundancy in memory controllers201810,089,360Apparatus and method for single pass entropy detection on data transfer201810,078,646Hardware efficient fingerprinting201810,068,650Characterizing and operating a non-volatile memory device201810,067,823Systems and methods for adaptive error corrective code mechanisms20189,940,036System and method for controlling various aspects of PCIe direct attached nonvolatile memory storage subsystems20189,921,896'Shutdowns and data recovery to avoid read errors weak pages in a non-volatile memory system'20189,842,660'System and method to improve enterprise reliability through tracking I/O performance metrics in non-volatile random access memory'20179,727,112'Methods for early write termination with non-volatile memory'20179,678,665'Methods and systems for memory page allocation'20179,619,326'Methods and systems for implementing redundancy in memory controllers'20179,620,227'Characterizing and operating a non-volatile memory device'20179,612,763'Apparatus and methods to control power on PCIe direct attached nonvolatile memory storage subsystems'20179,582,417'Memory apparatus and methods thereof for preventing read errors on weak pages in a non-volatile memory system'20179,552,384'Apparatus and method for single pass entropy detection on data transfer'20178,850,091'Methods for early write termination with non-volatile memory'20148,706,932'Replaceable non-volatile memory apparatus with a plurality of pluggable electrical connectors'20148,689,042'Methods for data redundancy across replaceable non-volatile memory storage devices'20148,677,037'Memory apparatus for early write termination and power failure'20148,650,343'Methods for upgrading, diagnosing, and maintaining replaceable non-volatile memory'20148,639,863'Memory apparatus for replaceable non-volatile memory'20148,630,143'Multiple-port memory device comprising single-port memory device with supporting control circuitry'20148,514,652'Multiple-port memory device comprising single-port memory device with supporting control circuitry'20138,516,172'Methods for early write termination and power failure with non-volatile memory'20138,429,318'Methods for early write termination into non-volatile memory with metadata write operations'2013

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2013–2017Patents assigned to VIRIDENT SYSTEMS INC (10)· patent assignee history
2013–2014Patents assigned to NARASIMHA ASHWIN (9)· patent assignee history
2013–2014Patents assigned to KARAMCHETI VIJAY (8)· patent assignee history
2013–2020Based in Sunnyvale, CA, US· patent location history
2013–2014Based in Bangalore, IN· patent location history
2017–2021Patents assigned to WESTERN DIGITAL TECH INC (18)· patent assignee history
2017–2018Patents assigned to HGST Netherlands BV (9)· patent assignee history
2017–2021Based in Los Altos, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
WESTERN DIGITAL TECH INC182017–2021
VIRIDENT SYSTEMS INC102013–2017
HGST Netherlands BV92017–2018
NARASIMHA ASHWINself92013–2014
KARAMCHETI VIJAY82013–2014
Locations
LocationPatentsSpan
Los Altos, California, US162017–2021
Sunnyvale, California, US162013–2020
Bangalore, IN22013–2014