Inventor

Dinesh Agarwal

Inventor
Bangalore, IN

Overview

21→
Patents
2002–2021
Patent span
Physics
Primary field (CPC G)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing52%
G11CStatic stores29%
LOC1410%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes3%
G06TImage data processing or generation, in general3%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
PatentTitleYear
11,023,259Apparatus and method of user or device based application differentiation202110,963,592Method to unlock a secure digital memory device locked in a secure digital operational mode202110,846,017Secure digital (SD) to NVMe buffer manager202010,635,326Method and apparatus for wear-levelling non-volatile memory202010,303,384Task readiness for queued storage tasks201910,269,421Latch caching of sequential data201910,235,223High-performance computing framework for cloud computing environments201910,209,914System and method for dynamic folding or direct write based on block health in a non-volatile memory system201910,153,046Non-volatile memory with backing up of programmed data201810,095,556Parallel priority queue utilizing parallel heap on many-core processors for accelerating priority-queue-based applications201810,055,267Block management scheme to handle cluster failures in non-volatile memory20189,875,039Method and apparatus for wear-leveling non-volatile memory20189,841,910'Moving and committing valid data on a set-by-set basis'20179,778,863'System and method for folding partial blocks into multi-level cell memory blocks'20179,582,358'Initialization scheme during dual programming of a memory system'20179,542,286'Failure logging mechanism to reduce garbage collection time in partially reused bad blocks'20179,530,491'System and method for direct write to MLC memory'2016D0750119'Split display screen with graphical user interface'2016D0715248'Curved split-screen cellphone'2014D0704673'Curved split-screen cellphone'20146,408,309'Method and system for creating an interactive virtual community of famous people'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2016Based in Burke, VA, US· patent location history
2014–2019Patents assigned to AGARWAL DINESH (4)· patent assignee history
2016–2020Patents assigned to SANDISK TECHNOLOGIES LLC (10)· patent assignee history
2016–2018Patents assigned to SANDISK TECHNOLOGIES INC (6)· patent assignee history
2016–2021Based in Bangalore, IN· patent location history
2018–2021Patents assigned to WESTERN DIGITAL TECH INC (4)· patent assignee history
2018–2019Patents assigned to UNIV GEORGIA STATE RES FOUND (2)· patent assignee history
2018–2019Based in Atlanta, GA, US· patent location history
2021Based in Redmond, WA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SANDISK TECHNOLOGIES LLC102016–2020
SANDISK TECHNOLOGIES INC62016–2018
AGARWAL DINESHself42014–2019
WESTERN DIGITAL TECH INC42018–2021
UNIV GEORGIA STATE RES FOUND22018–2019
Locations
LocationPatentsSpan
Bangalore, IN142016–2021
Burke, Virginia, US42002–2016
Atlanta, Georgia, US22018–2019
Redmond, Washington, US12021