Inventor
Yunpeng Yin
Inventor
Niskayuna, NY, US
Overview
Patents· 84 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices26%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H10DInorganic electric semiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
Y10TTechnical subjects covered by former us classification2%
E04BGeneral building constructions2%
F24SSolar heat collectors2%
Y02ATechnologies for adaptation to climate change2%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications2%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution2%
PatentTitleYear
11,104,777Insulative apparatus202110,566,454Self-aligned contact process enabled by low temperature202010,529,858FinFET with merge-free fins202010,340,368Fin formation in fin field effect transistors201910,170,327Fin density control of multigate devices through sidewall image transfer processes201910,170,471Bulk fin formation with vertical fin sidewall profile201910,168,075Critical dimension shrink through selective metal growth on metal hardmask sidewalls201910,164,060Work function metal fill for replacement gate fin field effect transistor process201810,147,803Work function metal fill for replacement gate fin field effect transistor process201810,141,428Fin formation in fin field effect transistors201810,037,944Self-aligned contact process enabled by low temperature201810,020,303Methods for forming FinFETs having epitaxial Si S/D extensions with flat top surfaces on a SiGe seed layer20189,997,367Non-lithographic line pattern formation20189,991,258FinFETs with non-merged epitaxial S/D extensions having a SiGe seed layer on insulator20189,991,255FinFETs with non-merged epitaxial S/D extensions on a seed layer and having flat top surfaces20189,985,030FinFET semiconductor device having integrated SiGe fin20189,953,916Critical dimension shrink through selective metal growth on metal hardmask sidewalls20189,768,276'Method and structure of forming FinFET electrical fuse structure'20179,728,534'Densely spaced fins for semiconductor fin field effect transistors'20179,728,419'Fin density control of multigate devices through sidewall image transfer processes'20179,728,625'Fin formation in fin field effect transistors'20179,716,038'Critical dimension shrink through selective metal growth on metal hardmask sidewalls'20179,647,092'Method and structure of forming FinFET electrical fuse structure'20179,634,000'Partially isolated fin-shaped field effect transistors'20179,634,117'Self-aligned contact process enabled by low temperature'20179,627,263'Stop layer through ion implantation for etch stop'20179,595,473'Critical dimension shrink through selective metal growth on metal hardmask sidewalls'20179,583,585'Gate structure integration scheme for fin field effect transistors'20179,558,999'Ultra-thin metal wires formed through selective deposition'20179,543,407'Low-K spacer for RMG finFET formation'20179,515,089'Bulk fin formation with vertical fin sidewall profile'20169,508,713'Densely spaced fins for semiconductor fin field effect transistors'20169,484,440'Methods for forming FinFETs with non-merged epitaxial fin extensions'20169,406,746'Work function metal fill for replacement gate fin field effect transistor process'20169,396,957'Non-lithographic line pattern formation'20169,391,155'Gate structure integration scheme for fin field effect transistors'20169,379,218'Fin formation in fin field effect transistors'20169,373,580'Dual hard mask lithography process'20169,330,965'Double self aligned via patterning'20169,330,962'Non-lithographic hole pattern formation'20169,324,830'Self-aligned contact process enabled by low temperature'20169,293,345'Sidewall image transfer with a spin-on hardmask'20169,257,334'Double self-aligned via patterning'20169,252,022'Patterning assist feature to mitigate reactive ion etch microloading effect'20169,252,243'Gate structure integration scheme for fin field effect transistors'20169,219,007'Double self aligned via patterning'20159,209,178'finFET isolation by selective cyclic etch'20159,105,641'Profile control in interconnect structures'20159,099,401'Sidewall image transfer with a spin-on hardmask'20159,093,326'Electrically isolated SiGe fin formation by local oxidation'20159,076,733'Self-aligned trench over fin'20159,064,813'Trench patterning with block first sidewall image transfer'20159,064,901'Fin density control of multigate devices through sidewall image transfer processes'20159,059,257'Self-aligned vias formed using sacrificial metal caps'20159,059,019'Semiconductor device including source/drain formed on bulk and gate channel formed on oxide layer'20159,059,002'Non-merged epitaxially grown MOSFET devices'20159,054,020'Double density semiconductor fins and method of fabrication'20159,053,965'Partially isolated Fin-shaped field effect transistors'20159,054,156'Non-lithographic hole pattern formation'20159,041,094'Finfet formed over dielectric'20158,986,921'Lithographic material stack including a metal-compound hard mask'20158,969,189'Contact structure employing a self-aligned gate cap'20158,969,213'Non-lithographic line pattern formation'20158,957,478'Semiconductor device including source/drain formed on bulk and gate channel formed on oxide layer'20158,951,850'FinFET formed over dielectric'20158,916,337'Dual hard mask lithography process'20148,901,711'Horizontal metal-insulator-metal capacitor'20148,883,649'Sidewall image transfer process'20148,872,244'Contact structure employing a self-aligned gate cap'20148,859,384'Inductor formation with sidewall image transfer'20148,859,433'DSA grapho-epitaxy process with etch stop material'20148,835,305'Method of fabricating a profile control in interconnect structures'20148,796,812'Self-aligned trench over fin'20148,735,283'Method for forming small dimension openings in the organic masking layer of tri-layer lithography'20148,716,133'Three photomask sidewall image transfer method'20148,637,406'Image transfer process employing a hard mask layer'20148,586,478'Method of making a semiconductor device'20138,586,482'Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation'20138,580,692'Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation'20138,518,824'Self aligning via patterning'20138,470,711'Tone inversion with partial underlayer etch for semiconductor device formation'20138,298,954'Sidewall image transfer process employing a cap material layer for a metal nitride layer'20128,298,943'Self aligning via patterning'20128,119,531'Mask and etch process for pattern assembly'2012Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2012–2020Patents assigned to IBM (79)· patent assignee history
2012–2015Patents assigned to YIN YUNPENG (17)· patent assignee history
2012–2014Patents assigned to ARNOLD JOHN C (8)· patent assignee history
2012–2014Patents assigned to BURNS SEAN D (7)· patent assignee history
2012–2020Based in Niskayuna, NY, US· patent location history
2012–2014Based in Guilderland, NY, US· patent location history
2013–2017Based in Armonk, NY, US· patent location history
2014Based in Albany, NY, US· patent location history
2015–2020Patents assigned to GLOBALFOUNDRIES INC (8)· patent assignee history
2015–2020Based in Schenectady, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 79 | 2012–2020 |
| YIN YUNPENGself | 17 | 2012–2015 |
| ARNOLD JOHN C | 8 | 2012–2014 |
| GLOBALFOUNDRIES INC | 8 | 2015–2020 |
| BURNS SEAN D | 7 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Niskayuna, New York, US | 63 | 2012–2020 |
| Schenectady, New York, US | 11 | 2015–2020 |
| Guilderland, New York, US | 5 | 2012–2014 |
| Armonk, New York, US | 2 | 2013–2017 |
| Albany, New York, US | 2 | 2014 |