Inventor

Valeriy B. Kudryavtsev

Inventor

Moscow, RU

Overview

20→

Patents

1997–2006

Patent span

Electricity

Primary field (CPC H)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing25%

H10DInorganic electric semiconductor devices18%

H03KPulse technique15%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1015%

G11CStatic stores13%

H10BElectronic memory devices13%

PatentTitleYear

7,103,865'Process and apparatus for placement of megacells in ICs design'2006 6,407,434'Hexagonal architecture'2002 6,134,702'Physical design automation system and process for designing integrated circuit chips using multiway partitioning with constraints'2000 6,097,073'Triangular semiconductor or gate'2000 5,973,376'Architecture having diamond shaped or parallelogram shaped cells'1999 5,909,376'Physical design automation system and process for designing integrated circuit chips using highly parallel sieve optimization with multiple \"jiggles\"'1999 5,864,165'Triangular semiconductor NAND gate'1999 5,838,585'Physical design automation system and method using monotonically improving linear clusterization'1998 5,835,378'Computer implemented method for leveling interconnect wiring density in a cell placement for an integrated circuit chip'1998 5,834,821'Triangular semiconductor \"AND\" gate device'1998 5,811,863'Transistors having dynamically adjustable characteristics'1998 5,801,422'Hexagonal SRAM architecture'1998 5,784,287'Physical design automation system and process for designing integrated circuit chips using generalized assignment'1998 5,777,360'Hexagonal field programmable gate array architecture'1998 5,742,086'Hexagonal DRAM array'1998 5,699,265'Physical design automation system and process for designing integrated circuit chips using multiway partitioning with constraints'1997 5,661,663'Physical design automation system and method using hierarchical clusterization and placement improvement based on complete re-placement of cell clusters'1997 5,654,563'Microelectronic integrated circuit including triangular semiconductor \"or\" g'1997 5,650,653'Microelectronic integrated circuit including triangular CMOS \"nand\" gate device'1997 5,631,581'Microelectronic integrated circuit including triangular semiconductor \"and\" gate device'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997–2006Patents assigned to LSI LOGIC CORP (20)· patent assignee history

1997–2006Based in Moscow, RU· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
LSI LOGIC CORP	20	1997–2006

Locations

Location	Patents	Span
Moscow, RU	20	1997–2006